SDA9489X Datasheet, PDF (10/102 Pages) List of Unclassifed Manufacturers – PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs

SDA 9489X
SDA 9589X
4
System Description
Preliminary Data Sheet
System Description
4.1
Analog Frontend
4.1.1
Input Selection
An analog inset CVBS signal can be fed to the inputs CVBS1-3 of SDA 9589X/SDA
9489X. Each of these sources is selectable via I²C bus (CVBSEL). CVBS2 and CVBS3
can be used as separate Y/C inputs. At SDA 9589X YUV sources can be connected to
CVBS1, CVBS2 and CVBS3 provided YUV operation being enabled (YUVSEL). Using
an external switch SDA 9589X can operate in applications with both YUV and CVBS
signals.
CVBSEL
D1 D0
00
01
10
11
XX
YUVSEL
0
0
0
0
1
CVBS1
CVBS
Input
CVBS2
CVBS
Y (VBS)
Y (VBS) U (CB)
CVBS3
C
CVBS
V (CR)
Table 4-1 Input selection
remark
Y/C mode
YUV mode
(only SDA 9589X)
4.1.2
AD-Conversion
All signal are clamped and AD-converted with an amplitude resolution of 8bit. CVBS and
Y signals are clamped to the sync bottom whereas U/V and C signals are clamped to
their mid-level during blanking.
Inset
Video
HD
CLAMPI
CLMPIST
CLMPID
Figure 4-1 Clamping timing
Micronas
4-10