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CH7004C Datasheet, PDF (25/51 Pages) List of Unclassifed Manufacturers – Digital PC to TV Encoder with Macrovision
CHRONTEL
CH7004C
I2C Port Operation
The CH7004 contains a standard I2C control port, through which the control registers can be written and read. This
port is comprised of a two-wire serial interface, pins SD (bi-directional) and SC, which can be connected directly to
the SDB and SCB buses as shown in Figure 19.
The Serial Clock line (SC) is input only and is driven by the output buffer of the master device (also shown in
Figure 19). The CH7004 acts as a slave, and generation of clock signals on the bus is always the responsibility of
the master device. When the bus is free, both lines are HIGH. The output stages of devices connected to the bus
must have an open-drain or open-collector to perform the wired-AND function. Data on the bus can be transferred
up to 400 kbit/s.
+VDD
RP
SDB (Serial Data Bus)
SCB (Serial Clock Bus)
SC
SD
SCLK
OUT
FROM
MASTER
DATAN2
OUT
MASTER
DATA IN
MASTER
SCLK
IN1
DATAN2
OUT
DATA
IN1
SCLK
IN2
DATAN2
OUT
DATA
IN2
BUS MASTER
SLAVE
SLAVE
Figure 19: Connection of Devices to the Bus
Electrical Characteristics for Bus Devices
The electrical specifications of the bus devices’ inputs and outputs and the characteristics of the bus lines connected
to them are shown in Figure 19. A pull-up resistor (RP) must be connected to a 5V ± 10% supply. The CH7004 is a
device with input levels related to VDD.
Maximum and minimum values of pull-up resistor (RP)
The value of RP depends on the following parameters:
• Supply voltage
• Bus capacitance
• Number of devices connected (input current + leakage current = Iinput)
The supply voltage limits the minimum value of resistor RP due to the specified minimum sink current of 3mA at
VOLmax = 0.4 V for the output stages:
RP >= (VDD – 0.4) / 3 (RP in kΩ)
The bus capacitance is the total capacitance of wire, connections and pins. This capacitance limits the maximum
value of RP due to the specified rise time. The equation for RP is shown below:
RP <= 103/C (where: RP is in kΩ and C, the total capacitance, is in pF)
The maximum HIGH level input current of each input/output connection has a specified maximum value of 10 µA.
Due to the desired noise margin of 0.2VDD for the HIGH level, this input current limits the maximum value of RP.
The RP limit depends on VDD and is shown below:
RP <= (100 x VDD)/ Iinput (where: RP is in kΩ and Iinput is in µA)
201-0000-024 Rev 2.1, 8/2/99
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