NT5DS32M8AT Datasheet, PDF (15/27 Pages) List of Unclassifed Manufacturers – 256Mb DDR333/300 SDRAM

NT5DS64M4AT NT5DS64M4AW
NT5DS32M8AT NT5DS32M8AW
256Mb DDR333/300 SDRAM
Truth Table 4: Current State Bank n - Command to Bank m (Different bank)
(Part 2 of 2)
Current State CS RAS CAS WE
L
L
H
H
Read (With
L
H
L
H
Auto Precharge) _L
H
L
L
L
L
H
L
L
L
H
H
Write (With
L
H
L
H
Auto Precharge) _L
H
L
L
L
L
H
L
Command
Active
Read
Write
Precharge
Active
Read
Write
Precharge
Action
Select and activate row
Select column and start new Read burst
Select column and start Write burst
Select and activate row
Select column and start Read burst
Select column and start new Write burst
Notes
1-6
1-7,10
1-7,9,10
1-6
1-6
1-7,10
1-7,10
1-6
1. This table applies when CKE n-1 was high and CKE n is high (see Truth Table 2: Clock Enable (CKE) and after t_{XSNR /} t_XSRD has been
met (if the previous state was self refresh).
2. This table describes alternate bank operation, except where noted, i.e., the current state is for bank n and the commands shown are
those allowed to be issued to bank m (assuming that bank m is in such a state that the given command is allowable). Exceptions are cov-
ered in the notes below.
3. Current state definitions:
Idle:
Row Active:
The bank has been precharged, and t_RP has been met.
A row in the bank has been activated, and t_RCD has been met. No data bursts/accesses and no register accesses are
in progress.
Read:
A Read burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
Write:
A Write burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
Read with Auto Precharge Enabled: See note 10.
Write with Auto Precharge Enabled: See note 10.
4. Auto Refresh and Mode Register Set commands may only be issued when all banks are idle.
5. A Burst Terminate command cannot be issued to another bank; it applies to the bank represented by the current state only.
6. All states and sequences not shown are illegal or reserved.
7. Reads or Writes listed in the Command/Action column include Reads or Writes with Auto Precharge enabled and Reads or Writes with
Auto Precharge disabled.
8. Requires appropriate DM masking.
9. A Write command may be applied after the completion of data output.
10. The Read with Auto Precharge enabled or Write with Auto Precharge enabled states can each be broken into two parts: the access
period and the precharge period. For Read with Auto Precharge, the precharge period is defined as if the same burst was executed with
Auto Precharge disabled and then followed with the earliest possible Precharge command that still accesses all of the data in the burst.
For Write with Auto Precharge, the precharge period begins when t_WR ends, with t_WR measured as if Auto Precharge was disabled. The
access period starts with registration of the command and ends where the precharge period (or t_RP) begins. During the precharge period
of the Read with Auto Precharge Enabled or Write with Auto Precharge Enabled states, Active, Precharge, Read, and Write commands
to the other bank may be applied; during the access period, only Active and Precharge commands to the other bank may be applied. In
either case, all other related limitations apply (e.g. contention between Read data and Write data must be avoided).
Preliminary
10/01
15
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