TA7S04 Datasheet, PDF (144/198 Pages) List of Unclassifed Manufacturers – Triscend A7S Configurable System-on-Chip Platform

Triscend A7S Configurable System-on-Chip Platform
Bus Clock
REQSEL
Single Request
Four-Request Burst
Figure 71. Example DMA Requests.
Single versus Block Requests
In most cases, a single request results in a single data transfer by the DMA channel.
However, if the DMA channel is in block request mode, then each request causes the
DMA to transfer a block of data, the size of which is specified in the Transfer Count Reg-
ister.
The device requesting a DMA transfer must be ready to send or receive data in a single
Bus Clock cycle, in response to an ACKSEL acknowledge signal. There are no wait-
states allowed for device-side transfers. Only memory-mapped CSL functions may have
wait-states.
Pending Request Counter
Once appropriately configured, a DMA channel receives all valid requests but does not
guarantee immediate service. Any un-serviced requests—for which the DMA channel has
not yet transferred data—are tracked in the DMA channel’s 10-bit Pending Request
Counter. The counter accumulates requests only if the corresponding DMA channel is
enabled. Software can read the value of the counter at any time. The pending requests
counter is cleared by setting the DMA clear bit or by enabling the DMA channel.
Up to 1,023 un-service requests can be accumulated. If a DMA channel accumulates too
many un-serviced requests, the channel can generate an interrupt, if so enabled.
The counter only tracks the number of requests signaled. If Block Request is enabled,
then each block transfer counts as one request.
If the auxiliary handshake signals are enabled, then a device can terminate the DMA
transaction early by signaling a “last” request. The position of that last request is stored,
so that the transaction can be terminated early, after service any requests that occurred
prior to the last request. The DMA controller maintains a separate “last” counter internally
as well as the pending request counter.
The ”last” request functionality is not available if Block Request is enabled.
SUBJECT TO CHANGE
144
TCH305-0001-002