TA7S04 Datasheet, PDF (114/198 Pages) List of Unclassifed Manufacturers – Triscend A7S Configurable System-on-Chip Platform

Triscend A7S Configurable System-on-Chip Platform
Revision Register (REMAP_REVISION_REG)
This register identifies the mask revision for the A7S device. This register is read-only.
Bit
Description/Function
31:0 Mask Revision Number:
A 32-bit constant identifying the mask revision for the device type indicated
in the REMAP_IDENTIFICATION_REG register.
Device
A7S04
A7S20
A7S20
A7S20
Revision Code
0x0_01_13
0x0_01_13
0x0_01_11
0x0_00_00
Revision Status
Production
Production
Prototype, no cache support
Obsolete
Not reset. Undefined.
Clear Reset Memory Map Register (REMAP_CLEAR_RESET_MAP_REG)
This register provides a means to change the system memory map from the user's current
memory map to the one used during normal operation. Writing this register causes the
memory map switch. It effectively clears the Flash alias bit in the Alias Enable Register.
This register is provided to maintain compatibility with other software created for the
ARM7TDMI processor. The same functionality is provided by the A7S’s Alias Enable
Register.
Bit
31:0 Reserved
Description/Function
Pin Status Register (REMAP_PIN_STATUS_REG)
This register enables software to monitor the status of some static pins of the device. This
register is read-only.
Bit
Description/Function
31:5 Reserved
4
VSYS Bad Flag (VSYS_BAD_BIT):
A ‘1’ indicates that the voltage level on the VSYS pin dropped to a “bad”
level permanently or temporarily.
3
VSYS Good Flag (VSYS_GOOD_BIT):
A ‘1’ indicates that the voltage level on the VSYS pin reached a “good”
level permanently or temporarily.
2
SLAVE- Pin Status (SLAVEN_BIT)
Should always be ‘1’. SLAVE- pin connects to VCCIO.
1
RST- Pin Status (RSTN_BIT)
0
VSYS Pin Status (VSYS_BIT)
Configuration reset value: bits [4:3] = ‘11’
Bits [2:0] are not reset. Undefined.
SUBJECT TO CHANGE
114
TCH305-0001-002