EN29LV040A_11 Datasheet, PDF (12/33 Pages) Eon Silicon Solution Inc. – 4 Megabit (512K x 8-bit ) Uniform Sector, CMOS 3.0 Volt-only Flash Memory

EN29LV040A
instant of time and valid data at the next instant of time. Depending on when the system samples the
DQ7 output, it may read the status of valid data. Even if the device has completed the embedded
operations and DQ7 has a valid data, the data output on DQ0-DQ6 may be still invalid. The valid data
on DQ0-DQ7 will be read on the subsequent read attempts.
The flowchart for DATA Polling (DQ7) is shown on Flowchart 5. The DATA Polling (DQ7) timing
diagram is shown in Figure 8.
DQ6: Toggle Bit I
The EN29LV040A provides a “Toggle Bit” on DQ6 to indicate to the host system the status of the
embedded programming and erase operations. (See Table 6)
During an embedded Program or Erase operation, successive attempts to read data from the device at
any address (by toggling OE or CE ) will result in DQ6 toggling between “zero” and “one”. Once the
embedded Program or Erase operation is complete, DQ6 will stop toggling and valid data will be read
on the next successive attempts. During Byte Programming, the Toggle Bit is valid after the rising edge
of the fourth WE pulse in the four-cycle sequence. For Chip Erase, the Toggle Bit is valid after the
rising edge of the sixth-cycle sequence. For Sector Erase, the Toggle Bit is valid after the last rising
edge of the Sector Erase W E pulse.
In Byte Programming, if the sector being written to is protected, DQ6 will toggles for about 2 μs, then
stop toggling without the data in the sector having changed. In Sector Erase or Chip Erase, if all
selected blocks are protected, DQ6 will toggle for about 100 μs. The chip will then return to the read
mode without changing data in all protected blocks.
Toggling either CE or OE will cause DQ6 to toggle.
The flowchart for the Toggle Bit (DQ6) is shown in Flowchart 6. The Toggle Bit timing diagram is shown
in Figure 9.
DQ5: Exceeded Timing Limits
DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit.
Under these conditions DQ5 produces a “1.” This is a failure condition that indicates the program or
erase cycle was not successfully completed. Since it is possible that DQ5 can become a 1 when the
device has successfully completed its operation and has returned to read mode, the user must check
again to see if the DQ6 is toggling after detecting a “1” on DQ5.
The DQ5 failure condition may appear if the system tries to program a “1” to a location that is previously
programmed to “0.” Only an erase operation can change a “0” back to a “1.” Under this condition,
the device halts the operation, and when the operation has exceeded the timing limits, DQ5 produces a
“1.” Under both these conditions, the system must issue the reset command to return the device to
reading array data.
DQ3: Sector Erase Timer
After writing a sector erase command sequence, the output on DQ3 can be used to determine whether
or not an erase operation has begun. (The sector erase timer does not apply to the chip erase
command.) When sector erase starts, DQ3 switches from “0” to “1.” This device does not support
multiple sector erase command sequences so it is not very meaningful since it immediately shows as a
“1” after the first 30h command. Future devices may support this feature.
This Data Sheet may be revised by subsequent versions
12
or modifications due to changes in technical specifications.
© 2003 Eon Silicon Solution, Inc.,
Rev. E, Issue Date: 2011/10/27
www.eonssi.com