EN29LV040A_11 Datasheet, PDF (11/33 Pages) Eon Silicon Solution Inc. – 4 Megabit (512K x 8-bit ) Uniform Sector, CMOS 3.0 Volt-only Flash Memory

EN29LV040A
DQ2. Refer to “Write Operation Status” for information on these status bits. Flowchart 4 illustrates the
algorithm for the erase operation. Refer to the Erase/Program Operations tables in the “AC Characteristics”
section for parameters, and to the Sector Erase Operations Timing diagram for timing waveforms.
Erase Suspend / Resume Command
The Erase Suspend command allows the system to interrupt a sector erase operation and then read data
from, or program data to, any sector not selected for erasure. This command is valid only during the sector
erase operation. The Erase Suspend command is ignored if written during the chip erase operation or
Embedded Program algorithm. Addresses are don’t-cares when writing the Erase Suspend command.
When the Erase Suspend command is written during a sector erase operation, the device requires a
maximum of 20 µs to suspend the erase operation.
After the erase operation has been suspended, the system can read array data from or program data to any
sector not selected for erasure. (The device “erase suspends” all sectors selected for erasure.) Normal read
and write timings and command definitions apply. Reading at any address within erase-suspended sectors
produces status data on DQ7–DQ0. The system can use DQ7, or DQ6 and DQ2 together, to determine if a
sector is actively erasing or is erase-suspended. See “Write Operation Status” for information on these status
bits.
After an erase-suspended program operation is complete, the system can once again read array data within
non-suspended sectors. The system can determine the status of the program operation using the DQ7 or
DQ6 status bits, just as in the standard program operation. See “Write Operation Status” for more information.
The Autoselect command is not supported during Erase Suspend Mode.
The system must write the Erase Resume command (address bits are don’t-care) to exit the erase suspend
mode and continue the sector erase operation. Further writes of the Resume command are ignored. Another
Erase Suspend command can be written after the device has resumed erasing.
WRITE OPERATION STATUS
DQ7: DATA Polling
The EN29LV040A provides DATA Polling on DQ7 to indicate to the host system the status of the
embedded operations. The DATA Polling feature is active during the embedded Programming, Sector
Erase, Chip Erase, Erase Suspend. (See Table 6)
When the embedded Programming is in progress, an attempt to read the device will produce the
complement of the data last written to DQ7. Upon the completion of the embedded Programming, an
attempt to read the device will produce the true data last written to DQ7. For the embedded
Programming, DATA polling is valid after the rising edge of the fourth WE or CE pulse in the four-
cycle sequence.
When the embedded Erase is in progress, an attempt to read the device will produce a “0” at the DQ7
output. Upon the completion of the embedded Erase, the device will produce the “1” at the DQ7 output
during the read. For Chip Erase, the DATA polling is valid after the rising edge of the sixth W E or CE
pulse in the six-cycle sequence. For Sector Erase, DATA polling is valid after the last rising edge of
the sector erase W E or C E pulse.
DATA Polling must be performed at any address within a sector that is being programmed or erased
and not a protected sector. Otherwise, DATA polling may give an inaccurate result if the address used
is in a protected sector.
Just prior to the completion of the embedded operations, DQ7 may change asynchronously when the
output enable ( OE ) is low. This means that the device is driving status information on DQ7 at one
This Data Sheet may be revised by subsequent versions
11
or modifications due to changes in technical specifications.
© 2003 Eon Silicon Solution, Inc.,
Rev. E, Issue Date: 2011/10/27
www.eonssi.com