HB52D48GB-F Datasheet, PDF (9/23 Pages) Elpida Memory – 32 MB Unbuffered SDRAM Micro DIMM 4-Mword × 64-bit, 100 MHz Memory Bus, 1-Bank Module (4 pcs of 4 M × 16 components) PC100 SDRAM

Block Diagram
HB52D48GB-F
S0
W
DQMB0
DQ0 to DQ7
CS
8 N0, N1
DQMB4
DQ32 to DQ39
D0
8 N8, N9
CS
D2
DQMB1
DQ8 to DQ15
8 N2, N3
DQMB5
DQ40 to DQ47
8 N10, N11
DQMB2
CS
DQMB6
CS
8 N4, N5
8 N12, N13
DQ16 to DQ23
DQ48 to DQ55
D1
D3
DQMB3
DQ24 to DQ31
8 N6, N7
DQMB7
DQ56 to DQ63
8 N14, N15
RE
CE
A0 to A11
BA0
BA1
CKE0
CK0
CK1
V_CC
V_SS
RAS (D0 to D3)
CAS (D0 to D3)
A0 to A11 (D0 to D3)
A13 (D0 to D3)
A12 (D0 to D3)
CKE (D0 to D3)
CLK (D0)
CLK (D1)
CLK (D2)
CLK (D3)
R0
C200
C0-C7
V_CC (D0 to D3, U0)
C100-C103
V_SS (D0 to D3, U0)
Serial PD
SCL
SCL
SDA
SDA
A0 U0
A1
A2
V_SS
Notes :
1. The SDA pull-up resistor is required due to
the open-drain/open-collector output.
2. The SCL pull-up resistor is recommended
because of the normal SCL line inacitve
"high" state.
* D0 to D3: HM5264165
U0: 2-kbit EEPROM
C0 to C7: 0.33 μF
C100 to C103: 0.1 μF
C200: 10 pF
N0 to N15: Network resistors (10 Ω)
R0: Resistor (10 Ω)
Data Sheet E0011H10
9