HB52D48GB-F Datasheet, PDF (20/23 Pages) Elpida Memory – 32 MB Unbuffered SDRAM Micro DIMM 4-Mword × 64-bit, 100 MHz Memory Bus, 1-Bank Module (4 pcs of 4 M × 16 components) PC100 SDRAM

HB52D48GB-F
HB52D48GB
Parameter
-A6F/A6FL/B6F/B6FL
Frequency (MHz)
100
t_CK (ns)
S to command disable
PC100
Symbol Symbol 10
l_CDD
0
Power down exit to command input
l_PEC
1
Burst stop to output valid data hold
(CE latency = 2)
l_BSR
1
(CE latency = 3)
l_BSR
2
Burst stop to output high impedance
(CE latency = 2)
l_BSH
2
(CE latency = 3)
l_BSH
3
Burst stop to write data ignore
l_BSW
0
Notes: 1. l_RCD to l_RRD are recommended value.
2. Be valid [DSEL] or [NOP] at next command of self refresh exit.
3. Except [DSEL] and [NOP].
Notes
Data Sheet E0011H10
20