GD25D10 Datasheet, PDF (6/28 Pages) ELM Electronics – Uniform sector dual and quad serial flash

GD25D10BxIGx Uniform sector dual and quad serial flash
3. MEMORY ORGANIZATION
http://www.elm-tech.com
Each device has
128K
512
32
2/4
Each block has
64/32K
256/128
16/8
-
Each sector has
4K
16
-
-
Each page has
256
-
-
-
bytes
pages
sectors
blocks
Uniform Block Sector Architecture
Block
1
0
Sector
31
-----
16
15
-----
0
01F000H
-----
010000H
00F000H
-----
000000H
Address range
01FFFFH
-----
010FFFH
00FFFFH
-----
000FFFH
4. DEVICE OPERATION
SPI Mode
Standard SPI
The GD25D10B features a serial peripheral interface on 4 signals bus: Serial Clock (SCLK), Chip Select (CS#),
Serial Data Input (SI) and Serial Data Output (SO). Both SPI bus mode 0 and 3 are supported. Input data is
latched on the rising edge of SCLK and data shifts out on the falling edge of SCLK.
Dual SPI
The GD25D10B supports Dual Output operation when using the “Dual Output Fast Read” (3BH) commands.
These commands allow data to be transferred to or from the device at two times the rate of the standard SPI.
When using the Dual Output command the SI and SO pins become bidirectional I/O pins: IO0 and O1.
5. DATA PROTECTION
The GD25D10B provides the following data protection methods:
♦ Write Enable (WREN) command: The WREN command is set the Write Enable Latch bit (WEL). The WEL
bit will reset to 0 in the following situations:
- Power-Up
- Write Disable (WRDI)
- Write Status Register (WRSR)
- Page Program (PP)
- Sector Erase (SE) / Block Erase (BE) / Chip Erase (CE)
28 - 6
Rev.1.0