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GD25D10 Datasheet, PDF (14/28 Pages) ELM Electronics – Uniform sector dual and quad serial flash
GD25D10BxIGx Uniform sector dual and quad serial flash
http://www.elm-tech.com
A Page Program (PP) command is not executed when it is applied to a page protected by the Block Protect (BP2,
BP1, BP0).
Figure 8. Page Program Sequence Diagram
7.9. Fast Page Program (FPP) (F2H)
The Fast Page Program (FPP) command is for programming the memory. A Write Enable (WREN) command
must previously have been executed to set the Write Enable Latch (WEL) bit before sending the Page Program
command.
The Fast Page Program (FPP) command is entered by driving CS# Low, followed by the command code, three
address bytes and at least one data byte on SI. If the 8 least significant address bits (A7-A0) are not all zero,
all transmitted data that goes beyond the end of the current page are programmed from the start address of the
same page (from the address whose 8 least significant bits (A7-A0) are all zero). CS# must be driven low for the
entire duration of the sequence.
The Page Program command sequence: CS# goes low → sending Page Program command → 3-byte address
on SI → at least 1 byte data on SI → CS# goes high.
The command sequence is shown in Figure9. If more than 256 bytes are sent to the device, previously latched
data are discarded and the last 256 data bytes are guaranteed to be programmed correctly within the same page.
If less than 256 data bytes are sent to device, they are correctly programmed at the requested addresses without
having any effects on the other bytes of the same page. CS# must be driven high after the eighth bit of the last
data byte has been latched in; otherwise the Fast Page Program (FPP) command is not executed.
As soon as CS# is driven high, the self-timed Page Program cycle (whose duration is tPP) is initiated. While the
Page Program cycle is in progress, the Status Register may be read to check the value of the Write In Progress
(WIP) bit. The Write In Progress (WIP) bit is 1 during the self-timed Page Program cycle, and is 0 when it is
completed. At some unspecified time before the cycle is completed, the Write Enable Latch (WEL) bit is reset.
A Fast Page Program (FPP) command is not executed when it is applied to a page protected by the Block
Protect (BP2, BP1, BP0).
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