GD25D10 Datasheet, PDF (17/28 Pages) ELM Electronics – Uniform sector dual and quad serial flash

GD25D10BxIGx Uniform sector dual and quad serial flash
Figure 12. 64KB Block Erase Sequence Diagram
http://www.elm-tech.com
CS#
SCLK
SI
0123456789
29 30 31
Command
D8H
24 Bits Address
23 22
MSB
210
7.13. Chip Erase (CE) (60/C7H)
The Chip Erase (CE) command is for erasing the all data of the chip. A Write Enable (WREN) command must
previously have been executed to set the Write Enable Latch (WEL) bit .The Chip Erase (CE) command is
entered by driving CS# Low, followed by the command code on Serial Data Input (SI). CS# must be driven Low
for the entire duration of the sequence.
The Chip Erase command sequence: CS# goes low → sending Chip Erase command → CS# goes high. The
command sequence is shown in Figure13. CS# must be driven high after the eighth bit of the command code
has been latched in, otherwise the Chip Erase command is not executed. As soon as CS# is driven high, the self-
timed Chip Erase cycle (whose duration is tCE) is initiated. While the Chip Erase cycle is in progress, the Status
Register may be read to check the value of the Write in Progress (WIP) bit. The Write in Progress (WIP) bit is 1
during the self-timed Chip Erase cycle, and is 0 when it is completed. At some unspecified time before the cycle
is completed, the Write Enable Latch (WEL) bit is reset. The Chip Erase (CE) command is executed if the Block
Protect (BP2, BP1, BP0) bits are all 0 or all 1. The Chip Erase (CE) command is not executed if any sector is
under protection.
Figure 13. Chip Erase Sequence Diagram
CS#
SCLK
01234567
Command
SI
60H or C7H
7.14. Deep Power-Down (DP) (B9H)
Executing the Deep Power-Down (DP) command is the only way to enter the lowest consumption mode
(the Deep Power-Down Mode). Unlike deselecting the device by driving CS# high, or entering into the
Standby Mode (if there is no internal cycle currently in progress), the Deep Power-Down Mode provides an
extra software protection mechanism while the device is not in active use. The only access to this mode is by
executing the Deep power-Down (DP) command. Since in the Deep Power-Down mode, the device ignores all
Write, Program and Erase commands. Once the device is in the Deep Power-Down Mode, all commands are
ignored except the Release from Deep Power-Down and Read Device ID (RDI) command. This releases the
device from this mode. The Release from Deep Power-Down and Read Device ID (RDI) command also allows
the Device ID of the device to be output on SO.
The Deep Power-Down Mode automatically stops at Power-Down, and the device always Power-Up in
the Standby Mode. The Deep Power-Down (DP) command is entered by driving CS# low, followed by the
command code on SI. CS# must be driven low for the entire duration of the sequence.
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Rev.1.0