GD25Q80 Datasheet, PDF (35/49 Pages) ELM Electronics – 3.3V Uniform Sector Dual and Quad Serial Flash

GD25Q80CxIGx 3.3V Uniform Sector Dual and Quad Serial Flash
http://www.elm-tech.com
Figure 35. Read Security Registers command Sequence Diagram
CS#
SCLK
0 1 2 3 4 5 6 7 8 9 10
28 29 30 31
SI
SO
CS#
SCLK
SI
SO
Command
48H
High-Z
24-bit address
23 22 21
3210
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
Dummy Byte
76543210
Data Out1
Data Out2
76543210765
MSB
MSB
7.31. Enable Reset (66H) and Reset (99H)
If the Reset command is accepted, any on-going internal operation will be terminated and the device will return
to its default power-on state and lose all the current volatile settings, such as Volatile Status Register bits, Write
Enable Latch status (WEL), Program/Erase Suspend status, Read Parameter setting (P7-P0), Continuous Read
Mode bit setting (M7-M0) and Wrap Bit Setting (W6-W4).
The “Reset (99H)” command sequence as follow: CS# goes low → Sending Enable Reset command → CS#
goes high → CS# goes low → Sending Reset command → CS# goes high. Once the Reset command is accepted
by the device, the device will take approximately tRST=60µs to reset. During this period, no command will be
accepted. Data corruption may happen if there is an on-going or suspended internal Erase or Program operation
when Reset command sequence is accepted by the device. It is recommended to check the BUSY bit and the
SUS bit in Status Register before issuing the Reset command sequence.
Figu_Fr_ie_gu3_r6_e.₃E_8.n_Ea_nb_al_be_leR_Re_es_se_et_ta_an_nd_d R_Ree_ss_ee_tt_cc_oo_mm_mm_ana_dnd_SeS_qe_uq_enu_ce_enc_De_iaD_gri_aa_mgram
7.34. Read Serial Flash Discoverable Parameter (5AH)
49 - 35
Rev.1.0