MA28139 Datasheet, PDF (3/34 Pages) Dynex Semiconductor – OBDH Bus Terminal

MA28139
FUNCTIONAL DESCRIPTION
In RT mode, power up resets the OBT and causes it to
deselect both busses. Two watchdog counters monitor the
Nominal l-bus and the Redundant l-bus. If either bus becomes
active, that bus will be selected. If the selected bus stops, the
OBT watchdog times out and resets both the OBT and the
user. If both busses become active, the Nominal bus will be
selected in preference to the Redundant one. A change in bus
selection will always result in the OBT and the user being
reset. Responses from the user are always returned on the
selected bus. Setting ‘SIMUL’ high causes both BATs to drive
both the Nominal and the Redundant busses irrespective of
the current bus selection. The time-out period may be set to
any desired number of bits by varying the ‘LOSC’ frequency.
The OBT derives all timing from, and is synchronous with, the
selected l-bus. The OBT demodulates the l-bus to the DBI and
decodes commands to the IUB.
The CTpRTn mode pin causes the modem circuits and the
RTU Kernel to be either cascade or isolated. If CTpRTn is low
(RT mode), the RIRSYNC, CLK, DATA and VAL signals are
routed to the RTU Kernel and the associated pins act as
outputs; responses from the RTU Kernel are ORed with those
from the external RRTDATA and RRTEN inputs and can be
independently monitored on the DATARRT and ENRRT pins.
In this mode any reset caused by the Clock Detector
watchdogs is also combined with the power up reset input.
If CTpRTn is high (CT mode), the modem and RTU Kernel
functions are isolated to permit the device to be used as either
a modem within the CTU or an RTU Kernel interfacing to an
external modem where the RIRSYNC, CLK, DATA and VAL
pins act as inputs. The right-hand multiplexer bank is switched
to the upper position so that the CT drives the OBDH via the
CIT and CBT (if used) pins and receives responses/telemetry
via the CRR and CBR (if used) pins. Note: in CT mode, BAT1
must be connected to the l-busses.
In RT mode, the CITSEL, MOD, CLK, SYNC and INV pins
are disabled and the clocks are supplied by the l-bus BAR in
response to the selected bus. In CT mode, the Clock Detector
is functional and drives the TlMEOUTn pin but is unable to
cause internal reset on time-out; in this mode the CT must
supply all clocks and select the operational bus.
The changes depending upon selection of RT mode or CT mode with the CTpRTn pin are defined in the table below:
Functional Signal
BAT1, 2 modulation clock
BAT1, 2 data clock
BAT1 data input
BAT1 tx enable
BAT1 sync code tx enable
BAT1 bit invalidate tx enable
BAT1, 2 bus selection
BAT2 data input
BAT2 tx enable
BAT1, 2, BAR1, 2, 3 reset
RIRSYNC, CLK, DATA,
VAL pin direction
BAT/BAR and RTU Kernel
coupling
CT Mode Source
(CTpRTn = ‘1’)
CITMOD input pin
CITCLK input pin
RRTDATA input pin
‘1’
CITSYNC input pin
CITINV input Pin
CITSEL and SIMUL input pins
RBTDATA input Pin
RBTEN input pin
MRSTn input pin
outputs
separated
RT Mode Source
(CTpRTn = ‘0’)
Recovered R2F
Recovered RIRCLK
RRTDATA OR DATARRT (RTU Kernel)
RRTEN OR DATAEN (RTU Kernel)
‘0’
‘0’
Detected active bus and SIMUL input pin
RBTDATA input pin
RBTEN input pin
TlMEOUTn AND MRSTn input pin
inputs
coupled
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