MA28139 Datasheet, PDF (12/34 Pages) Dynex Semiconductor – OBDH Bus Terminal

MA28139
OBDH / IUB INTERFACE
The Central Terminal Unit controls timing, commands and
telemetry to all subsystems on the OBDH bus. ESA TTC-B-01
specifies the OBDH to be 2 redundant sets (Nominal and
Redundant) of 2 twisted pairs (Interrogation and Response
bus) plus an optional redundant 3rd twisted pair (Block
Transfer bus), Litton modulated (self clocking with parity on
each bit), balanced transformer coupled for less than 1 error in
100 million bits on a 25 metre bus. The data rate is nominally
500K Bits/sec although the chip itself supports up to 5MBits/
sec. The OBT is transformer coupled with adjustable reference
and threshold levels as shown below. Litton more positive than
V_th+ makes discriminator signal NIDS1n low. Litton more
negative than V_th- makes NIDS2n low. OBT RR1n, RR2,
RR3n, RR4 control 4 switches which drive the bus with bipolar
Litton code when enabled. For clarity redundancy is not shown
below:
TTC-B-01 also specifies the IUB. The OBT supplies
specified clocks, memory load address for ML data (or channel
address for mode command) and responds on the R bus with a
13 zeroes response as acknowledgement. If the command
requires data aquisition, the OBT responds with a 13 or 21 bit
response containing 8 or 16 bits (respectively) of user data,
controlling external ADC as required.
I-BUS R-BUS
V_th+
+
-
NIDS1n
+
-
V_th-
REF
NIDS2n
+5V
GND
+5V
GND
RR2
RR1n
RR4
RR3n
ENABLE
OBT
CLOCKS
ML ADDRESS
ML DATA
CHANNEL ADDRESS
MODE COMMAND
DATA
ANALOG TO DIGITAL
CONVERTER CONTROLS
IUB
Note: Connections
to redundant OBDH
busses omitted for
clarity.
Figure 11: OBDH to IUB interface
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