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MA17501 Datasheet, PDF (27/35 Pages) Dynex Semiconductor – Radiation Hard MIL-STD-1750A Execution unit
MA17501
6.0 ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Input Voltage
Current Through Any Pin
Operating Temperature
Storage Temperature
Min
Max
-0.5
7
-0.3 VDD+0.3
-20
+20
-55
125
-65
150
Table 5: Absolute Maximum Ratings
Units
V
V
mA
°C
°C
Note: Stresses above those listed may cause permanent
damage to the device. This is a stress rating only and
functional operation of the device at these conditions, or at
any other condition above those indicated in the operations
section of this specification, is not implied. Exposure to
absolute maximum rating conditions for extended periods
may affect device reliability.
7.0 DC ELECTRICAL CHARACTERISTICS
Symbol Parameter
Conditions
Total Dose Radiation Not
Exceeding 3x105 Rad(Si)
Min Typ Max Units
VDD
VIHC
VILC
VIHT
VILT
VCH
VCL
VOHC
VOLC
VOHT
VOLT
VOHCLK
VOLCLK
II
IOZ
IIPU
IDDOP
IDDST
Supply Voltage
CMOS Input High Voltage (Note 1)
CMOS Input Low Voltage (Note 1)
TTL Input High Voltage (Note 2)
TTL Input Low Voltage (Note 2)
OSC Input High Voltage (Note 6)
OSC Input Low Voltage (Note 6)
CMOS Output High Voltage (Note 1)
CMOS Output Low Voltage (Note 1)
TTL Output High Voltage (Note 2)
TTL Output Low Voltage (Note 2)
Clock Output High Voltage (Note 3)
Clock Output Low Voltage (Note 3)
Input Leakage Current (Note 4)
Output Leakage Current (Note 4)
TESTN Input Pullup Current (Note 5)
Operating Supply Current
Static Supply Current
VSS = 0
-
-
-
-
-
-
IOH = -1.4mA, VDD = 4.5V
IOL = 2mA, VDD = 5.5V
IOH = -1.4mA, VDD = 4.5V
IOH = -1.4mA, VDD = 4.5V
IOH = -12mA, VDD = 4.5V
IOL = 12mA, VDD = 5.5V
VDD = 5.5V, VIN = 0V or 5.5V
VDD = 5.5V, VO = 0V or 5.5V
VDD = 5.5V, TESTN = 0V
VDD = 5.5V, OSC = 20MHz
VDD = 5.5V, OSC = 0MHz
4.5 5.0 5.5
V
VDD-1
-
-
V
-
-
VSS+1
V
2.0
-
-
V
-
-
0.8
V
4.0
-
-
V
-
-
1.0
V
4.0
-
-
V
-
-
0.5
V
3.5
-
-
V
-
-
0.4
V
4.0
-
-
V
-
-
0.5
V
-
-
±10 µA
-
-
±50 µA
-
-150 -300 µA
-
25
35
mA
-
5
10
mA
Mil-Std-883, Method 5005, Subgroup 1, 2, 3.
Notes: 1. The following signals are CMOS compatible:
a) CMOS inputs: Microcode Bus, (M00-M19), TESTN, IRDYN and PIFN.
b) CMOS outputs: T1, OVIN, INTREN, SYSCLK1N, CLKPCN and CLK02N.
2. The following signals are TTL compatible:
a) TTL inputs: HOLDN, RESET, PAUSEN, RDYN and OSC.
b) TTL outputs: HOLDAKN and SYNCN.
c) TTL 3 state outputs: AS, DSN, M/ION, RD/WN and IN/OPN.
d) TTL 3 state I/O signals: Address/Data Bus (AD00-AD15).
3. The clock output pins, SYSCLK1N, SYNCLK, CLKPCN and CLK02N have a higher drive capability than the
standard outputs.
4. Worst case at TA = +125°C, guaranteed but not tested at TA = -55°C.
5. The TESTN input signal is used during chip test and has an integral pullup reistor. In normal operation TESTN is at
VDD.
6. Guaranteed but not tested.
Table 6: Operating DC Electrical Characteristics
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