DA14580 Datasheet, PDF (27/155 Pages) –

DA14580
Low Power Bluetooth Smart 4.2 SoC
FINAL
Table 8: OTPC_STAT_REG (0x40008008)
Bit
28:16
15
14
13
12
11:8
7:5
4
3
2
1
0
Mode
R
R
R
R
R
R
-
R
R
R
R
R
Symbol
OTPC_STAT_NWOR
DS
OTPC_STAT_TERR_
U
OTPC_STAT_TERR_
L
OTPC_STAT_PERR_
U
OTPC_STAT_PERR_
L
OTPC_STAT_FWOR
DS
-
OTPC_STAT_ARDY
OTPC_STAT_TERR
OR
OTPC_STAT_TRDY
OTPC_STAT_PERR
OR
OTPC_STAT_PRDY
Description
Contains the current value of the words to be processed.
Indicates the upper bank as the source of a test error. This
value is valid when OTPC_STAT_TERROR is valid.
0 - There is no test error in the upper bank
1 - A test error has occured in the upper bank
Indicates the lower bank as the source of a test error. The
value is valid when OTPC_STAT_TERROR is valid.
0 - There is no test error in the lower bank
1 - A test error has occured in the lower bank
Indicates the upper bank as the source of a programming
error. The value is valid when OTPC_STAT_PERROR is
valid.
0 - There is no programming error in the upper bank
1 - A programming error has occured in the upper bank
Indicates the lower bank as the source of a programming
error. The value is valid when OTPC_STAT_PERROR is
valid.
0 - There is no programming error in the lower bank
1 - A programming error has occured in the lower bank
Indicates the number of words which contained in the fifo of
the controller.
Reserved
Monitors the progress of read or programming operations
while in the AREAD or APROG modes.
0 - The controller is busy while reading or programming
(AREAD or APROG modes).
1 - The controller is not busy in AREAD or APROG mode.
Indicates the result of a test sequence. Should be checked
after the end of a TBLANK, TDEC and TWR mode
(OTPC_STAT_TRDY= 1).
0 - The test sequence ends with no error.
1 - The test sequence has failed.
Indicates the state of a test mode. Should be used to monitor
the progress of the TBLANK, TDEC and TWR modes.
0 - The controller is busy. A test mode is in progress.
1 - There is no active test mode.
Indicates that an error has occurred during the bit-program-
ming process.
0 - No error during the bit-programming process.
1 - The process of bit-programming failed.
When the controller is in MPROG mode, this bit should be
checked after the end of the programming process
(OTPC_STAT_PRDY= 1).
During APROG mode, the value of this field is normal to
change periodically. Upon finishing the operation in the
APROG mode (OTPC_STAT_ARDY= 1), this field indicates
if the programming has failed or ended succesfully.
Indicates the state of a bit-programming process.
0 - The controller is busy. A bit-programming is in progress
1 - The logic which performs bit-programming is idle.
When the controller is in MPROG mode, this bit should be
used to monitor the progress of a programming request.
During APROG mode, the value of this field it is normal to
changing periodically.
Reset
0
0x0
0x0
0x0
0x0
0x0
0x0
0x1
0x0
0x1
0x0
0x1
Datasheet
CFR0011-120-00-FM
Revision 3.3
27 of 155
08-Jun-2016
© 2014 Dialog Semiconductor