DS1251Y Datasheet, PDF (9/12 Pages) Dallas Semiconductor – 4096K NV SRAM with Phantom Clock

DS1251Y
MEMORY WRITE CYCLE 2 (NOTES 2 AND 8)
WE = V_IH
t_WC
V_IH
ADDRESSES
V_IL
t_AW
t_WP
V_IH
ÏÏÏÏ _CE
V_IL
ÏÏÏÏÏÏÏÏÏÏÏÏÏ _WE
ÏÏÏÏÏÏÏÏÏ^VIL
t_ODW
t_COE
V_IH
V_IH
V_IL
V_IL
t_WR
V_IH
V_IL
V^ÌÌ_IL ^{ÌÌtOEÌÌW ÌÌÌÌÌÌÌÌÌÌ}
DQ0–DQ7
t_DS
V_{IH DATA IN}
V_IL STABLE
t_DH
V_IH
V_IL
RESET FOR PHANTOM CLOCK
RST
t_RST
READ CYCLE TO PHANTOM CLOCK
t_RC
t_CO
t_RR
CE
t_OD
t_OE
OE
t_OEE
t_ODO
Q
t_{COE ÌÌÌÌÌÌ}
OUTPUT DATA VALID
ÌÌÌÌÌÌ
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