DS1780 Datasheet, PDF (7/28 Pages) Dallas Semiconductor – CPU Peripheral Monitor

DS1780
Software Reset - This condition is generated by writing a 1 to bit 4 of the configuration register. It has no
effect on DS1780 register contents. It will however pull the RST output to the active low state for a
duration of 20 ms (minimum). When the RST output goes active, this bit in the configuration register will
clear itself. A Software Reset is only possible if Bit 7 of the INT Mask Register 2 (0x44h) is set to “1”.
Device Initialization - This condition is generated by writing a 1 to bit 7 of the configuration register. It
will clear all registers in DS1780 memory to their default state except the Value RAM (0x20h - 0x3Dh)
and analog output (0x19h). These locations will remain unchanged from their state before the
initialization. This condition has no effect on the RST output. This bit is self-clearing.
Hardware Reset - This condition is generated by some external source pulling the RST pin below
VIN(0) (see DC Electrical Characteristics). The DS1780 will then force the RST signal to remain in the
active low state for >20 ms. It will clear all registers in DS1780 memory to their default state except the
Value RAM (0x20h - 0x3Dh) and analog output (0x19h). These locations will remain unchanged from
their state before the Hardware Reset.
OPERATION - Configuration Register
Control of the DS1780 is provided through the configuration register. The Configuration Register is used
to start and stop the DS1780, enable or disable interrupt output and modes, and provide the initialization
function described above.
Bit 0 of the Configuration Register controls the monitoring loop of the DS1780. Setting Bit 0 low stops
the monitoring loop and puts the DS1780 into a standby mode. 2-Wire Bus communication is still
possible with any register in the DS1780 during the standby mode, however. Additionally, the DS1780
will continue to monitor the RST and CHS inputs while in a standby mode. Setting Bit 0 high starts the
monitoring loop.
Bit 1 of the Configuration Register enables or disables the INT Interrupt output. Setting Bit 1 high
enables the INT output, setting bit 1 low disables the output.
Bit 3 of the Configuration Register is used to clear the INT interrupt output when set high. The DS1780
monitoring function will stop until bit 3 is set low. Interrupt Status register contents will not be affected.
Bit 4 of the Configuration Register is used to initiate a minimum 20 ms RESET signal on the RST output
if the pin is configured for the RESET mode (via bit 7 of the INT Mask Register 2 - 0x44h).
Bit 6 of the Configuration Register is used to reset the Chassis Intrusion (CHS) output pin when set high.
Bit 7 of the Configuration Register is used to start a Configuration Register Initialization when taken
high, as described in the “OPERATION - Resets” section.
OPERATION - Monitoring Loop
The DS1780 monitoring function is started by doing a write to the Configuration Register and setting the
INT_Clear (Bit 3) low, and Start (Bit 0) high. At this point the INT_Enable (Bit 1) should be set high to
enable interrupts (INT). The DS1780 then performs a “round robin” sampling of the inputs, sampling
each approximately once a second, in the order (corresponding to locations in the Value RAM) shown
below in Table 3. The results of the sampling and conversions can be found in the Value RAM (Table
10.13) and are available at any time.
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