5962-9061102XX Datasheet, PDF (9/15 Pages) Cypress Semiconductor – 32-Macrocell MAX® EPLD

USE ULTRA37000^TM FOR
ALL NEW DESIGNS
Switching Waveforms (continued)
External Asynchronous
DEDICATED INPUTS OR
REGISTERED FEEDBACK
t_AS
ASYNCHRONOUS
CLOCK INPUT
ASYNCHRONOUS
CLEAR/PRESET
t_AOH
t_AH
t_ACO1
ASYNCHRONOUS REGISTERED
OUTPUTS
COMBINATORIAL OUTPUT FROM
ASYNCH. REGISTERED
FEEDBACK ^[19]
t_AWH
t_AWL
t_RW/t_PW
t_RO/t_PO
t_ACO2
t_RR/t_PR
Internal Combinatorial
INPUT PIN
I/O PIN
EXPANDER
ARRAY DELAY
LOGIC ARRAY
INPUT
t_IN
t_PIA
t_IO
t_EXP
t_LAC, t_LAD
LOGIC ARRAY
OUTPUT
CY7C344
Document #: 38-03006 Rev. *B
Page 9 of 15
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