English
Language : 

BCM4356XKUBGT Datasheet, PDF (86/195 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac 2×2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1, FM Receiver, and Wireless Charging
BCM4356 Advance Data Sheet
Pin Information
Section 13: Pin Information
Ball Maps
Figure 35 shows the WLBGA ball map.
Figure 35: BCM4356 A2 WLBGA BALL MAP; 12 × 18 Array; 192 Balls; Bottom View (Balls Facing Up)
12
A
SR_PVSS
11
SR_VLX
10
WL_REG_ON
9
SDIO_CMD
8
SDIO_CLK
7
BT_GPIO_5
6
BT_GPIO_2
5
4
PCIE_REFCLKN
PCIE_REFCLKP
3
PCIE_TDN
2
PCIE_TDP
1
A
B SR_VDDBATP5V SR_VDDBATA5V
PMU_AVSS
SDIO_DATA_0
SDIO_DATA_2
VDDC
NC
PCIE_PLL_AVSS
PCIE_RXTX_AVSS
PCIE_PLL_AVDD1P2
PCIE_RXTX_AVDD1
P2
PCIE_RDN
B
C
LDO_VDD1P5
VOUT_CLDO
VSSC
SDIO_DATA_1
SDIO_DATA_3
NC
NC
PCIE_PME_L
PCIE_PERST_L
PCIE_TESTP
PCIE_TESTN
PCIE_RDP
C
D VOUT_BTLDO2P5
VOUT_LNLDO
BT_REG_ON
JTAG_SEL
BT_GPIO_3
VSSC
PCIE_CLKREQ_L
VDDC
VSSC
D
E LDO_VDDBAT5V VOUT_LDO3P3_B
VDDIO
VDDC
VDDIO_SD
GPIO_7
GPIO_9
BT_USB_DN
BT_VDDC
FM_AUDIOVDD1P2
FM_AOUT1
E
F
VOUT_3P3
GPIO_2
G
VSSC
GPIO_0
H
GPIO_10
VDDIO_RF
GPIO_1
VDDC
GPIO_5
GPIO_3
GPIO_4
GPIO_6
VSSC
GPIO_8
LPO_IN
BT_USB_DP
CLK_REQ
FM_PLLVDD1P2
FM_AUDIOVSS
FM_AOUT2
F
AVSS_BBPLL
BT_I2S_DO
BT_I2S_DI
VSSC
FM_PLLVSS
FM_VCOVSS
FM_LNAVCOVDD1P
2
G
AVDD_BBPLL
BT_UART_RXD
BT_PCM_OUT
BT_VDDC
FM_LNAVSS
FM_RFIN
H
J
VDDC
RF_SW_CTRL_9
RF_SW_CTRL_12
VDDC
BT_I2S_CLK
BT_UART_TXD
BT_PCM_IN
BT_HOST_WAKE
BT_VCOVSS
BT_VCOVDD1P2 J
K RF_SW_CTRL_8
RF_SW_CTRL_13
BT_VDDO
BT_PCM_SYNC BT_UART_RTS_N
BT_GPIO_4
BT_IFVDD1P2
BT_PLLVDD1P2
BT_LNAVDD1P2
K
L
VSSC
VDDC
RF_SW_CTRL_11 RF_SW_CTRL_15
VSSC
BT_I2S_WS
BT_UART_CTS_N BT_DEV_WAKE
BT_PLLVSS
BT_PAVSS
BT_RF
L
M RF_SW_CTRL_10
RF_SW_CTRL_14
RF_SW_CTRL_7
VDDC
BT_PCM_CLK
BT_VDDC
VSSC
BT_IFVSS
BT_PAVDD2P5
M
N WRF_XTAL_OUT WRF_XTAL_GND1P2 WRF_XTAL_VDD1P2
RF_SW_CTRL_1 RF_SW_CTRL_3
RF_SW_CTRL_4
WRF_RX2G_GND1P WRF_LNA_2G_GND WRF_RFIN_2G_COR
2_CORE0
1P2_CORE0
E0
N
P
WRF_XTAL_IN WRF_XTAL_VDD1P5
RF_SW_CTRL_2
RF_SW_CTRL_5
RF_SW_CTRL_6
WRF_AFE_GND1P2_ WRF_TX_GND1P2_ WRF_PA2G_VBAT_ WRF_RFOUT_2G_C
CORE0
CORE0
GND3P3_CORE0
ORE0
P
R
WRF_BUCK_GND1P WRF_BUCK_VDD1P
5_CORE1
5_CORE1
WRF_GPIO_OUT_C WRF_AFE_GND1P2_
ORE1
CORE1
RF_SW_CTRL_0
WRF_LOGEN_GND1 WRF_LOGENG_GND WRF_GPIO_OUT_C WRF_PADRV_VBAT WRF_PA2G_VBAT_ WRF_PA2G_VBAT_
P2
1P2
ORE0
_VDD3P3_CORE0 GND3P3_CORE0 VDD3P3_CORE0
R
T
WRF_RX5G_GND1P WRF_TSSI_A_CORE WRF_PADRV_VBAT
2_CORE1
1
_GND3P3_CORE1
WRF_PADRV_VBAT
_VDD3P3_CORE1
WRF_TX_GND1P2_
CORE1
WRF_RX2G_GND1P
2_CORE1
WRF_MMD_GND1P2
WRF_MMD_VDD1P2
WRF_PFD_VDD1P2
WRF_PADRV_VBAT
_GND3P3_CORE0
WRF_PA5G_VBAT_
GND3P3_CORE0
WRF_PA5G_VBAT_
VDD3P3_CORE0
T
U
WRF_LNA_5G_GND
1P2_CORE1
WRF_PA5G_VBAT_
GND3P3_CORE1
WRF_PA5G_VBAT_
GND3P3_CORE1
WRF_PA2G_VBAT_
GND3P3_CORE1
WRF_PA2G_VBAT_
GND3P3_CORE1
WRF_LNA_2G_GND
1P2_CORE1
WRF_VCO_GND1P2
WRF_PFD_GND1P2
WRF_BUCK_VDD1P
5_CORE0
WRF_TSSI_A_CORE
0
WRF_PA5G_VBAT_
GND3P3_CORE0
WRF_RFOUT_5G_C
ORE0
U
V
WRF_RFIN_5G_COR WRF_RFOUT_5G_C WRF_PA5G_VBAT_
E1
ORE1
VDD3P3_CORE1
WRF_PA2G_VBAT_ WRF_RFOUT_2G_C WRF_RFIN_2G_COR WRF_SYNTH_VBAT
VDD3P3_CORE1
ORE1
E1
_VDD3P3
WRF_CP_GND1P2
WRF_BUCK_GND1P WRF_RX5G_GND1P WRF_LNA_5G_GND WRF_RFIN_5G_COR
5_CORE0
2_CORE0
1P2_CORE0
E0
V
12
11
10
9
8
7
6
5
4
3
2
1
Broadcom®
May 8, 2015 • 4356-DS103-R
BROADCOM CONFIDENTIAL
Page 85