PSOC4000 Datasheet, PDF (8/34 Pages) Cypress Semiconductor – Programmable System-on-Chip

PSoC^® 4: PSoC 4000 Family
Datasheet
Table 1. Pin Descriptions (continued)
28-Pin SSOP
24-Pin QFN
16-Pin QFN
16-Pin SOIC
8-Pin SOIC
Pin
Name
Pin
11
VSS
12 No Connect (NC)^[2]
Name
Pin
Name
Pin
Name
Pin
Name
TCPWM Signals Alternate Functions
13 P1.7/MATCH/EXT_ 19 P1.7/MATCH/EXT_ 13 P1.7/MATCH/EXT_ 15 P1.7/MATCH/EXT_
CLK
CLK
CLK
CLK
MATCH: Match Out External Clock
14
P2.0
20
P2.0
16
P2.0
15
VSS
16 P3.0/SDA/SWD_IO 21 P3.0/SDA/SWD_IO 14 P3.0/SDA/SWD_IO 1 P3.0/SDA/SWD_IO 8 P3.0/SDA/SWD_IO
I2C Data, SWD I/O
17 P3.1/SCL/SWD_CL 22 P3.1/SCL/SWD_CL 15 P3.1/SCL/SWD_CL 2 P3.1/SCL/SWD_CL 1 P3.1/SCL/SWD_CL
K
K
K
K
K
I2C Clock, SWD
Clock
18
P3.2
23
P3.2
16
P3.2
OUT0:PWM OUT 0
19
XRES
24
XRES
XRES: External
Reset
Descriptions of the Pin functions are as follows:
VDD: Power supply for both analog and digital sections.
VDDIO: Where available, this pin provides a separate voltage domain (see the Power section for details).
VSS: Ground pin.
VCCD: Regulated digital supply (1.8 V ±5%).
Pins belonging to Ports 0, 1, and 2 can all be used as CSD sense or shield pins connected to AMUXBUS A or B. They can also be used as GPIO pins that can be driven by
the firmware, in addition to their alternate functions listed in the Table 1.
Pins on Port 3 can be used as GPIO, in addition to their alternate functions listed above.
The following packages are provided: 28-pin SSOP, 24-pin QFN, 16-pin QFN, 16-pin SOIC, and 8-pin SOIC.
Note
2. This pin is not to be used; it must be left floating.
Document Number: 001-89638 Rev. *E
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