PSOC4000 Datasheet, PDF (16/34 Pages) Cypress Semiconductor – Programmable System-on-Chip

PSoC^® 4: PSoC 4000 Family
Datasheet
Table 6. GPIO DC Specifications (referenced to V_DDIO for 16-Pin QFN V_DDIO pins) (continued)
Spec ID#
SID67^[7]
SID68^[7]
SID68A^[7]
SID69^[7]
SID69A^[7]
Parameter
V_HYSTTL
V_HYSCMOS
V_HYSCMOS5V5
I_DIODE
I_{TOT_GPIO}
Description
Input hysteresis LVTTL
Input hysteresis CMOS
Input hysteresis CMOS
Current through protection diode to
V_DD/V_SS
Maximum total source or sink chip
current
Min Typ Max
15
40
–
0.05 ×
–
–
V_DD
200
–
–
–
–
100
–
–
85
Table 7. GPIO AC Specifications
(Guaranteed by Characterization)
Spec ID# Parameter
Description
SID70
T_RISEF
Rise time in fast strong mode
SID71
T_FALLF
Fall time in fast strong mode
SID72
T_RISES
Rise time in slow strong mode
SID73
T_FALLS
Fall time in slow strong mode
SID74
F_GPIOUT1
GPIO F_OUT; 3.3 V  V_DD 5.5 V.
Fast strong mode.
SID75
F_GPIOUT2
GPIO F_OUT; 1.71 VV_DD3.3 V.
Fast strong mode.
SID76
F_GPIOUT3
GPIO F_OUT; 3.3 V V_DD 5.5 V.
Slow strong mode.
SID245
F_GPIOUT4
GPIO F_OUT; 1.71 V V_DD 3.3 V.
Slow strong mode.
SID246
F_GPIOIN
GPIO input operating frequency;
1.71 V V_DD 5.5 V
Min Typ Max
2
–
12
2
–
12
10
–
60
10
–
60
–
–
16
–
–
16
–
–
7
–
–
3.5
–
–
16
Units
mV
mV
Details/
Conditions
V_DD  2.7 V
V_DD < 4.5 V
mV V_DD > 4.5 V
µA
mA
Units
ns
ns
–
–
MHz
MHz
MHz
MHz
MHz
Details/
Conditions
3.3 V V_DD,
Cload = 25 pF
3.3 V V_DD,
Cload = 25 pF
3.3 V V_DD,
Cload = 25 pF
3.3 V V_DD,
Cload = 25 pF
90/10%, 25 pF
load, 60/40 duty
cycle
90/10%, 25 pF
load, 60/40 duty
cycle
90/10%, 25 pF
load, 60/40 duty
cycle
90/10%, 25 pF
load, 60/40 duty
cycle
90/10% V_IO
Note
7. Guaranteed by characterization.
Document Number: 001-89638 Rev. *E
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