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PSOC4000 Datasheet, PDF (1/34 Pages) Cypress Semiconductor – Programmable System-on-Chip | |||
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PSoC® 4: PSoC 4000 Family
Datasheet
Programmable System-on-Chip (PSoC®)
General Description
PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an
ARM® Cortexâ¢-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The
PSoC 4000 product family is the smallest member of the PSoC 4 platform architecture. It is a combination of a microcontroller with
standard communication and timing peripherals, a capacitive touch-sensing system (CapSense) with best-in-class performance, and
general-purpose analog. PSoC 4000 products will be fully upward compatible with members of the PSoC 4 platform for new applica-
tions and design needs.
Features
32-bit MCU Subsystem
â 16-MHz ARM Cortex-M0 CPU
â Up to 16 KB of flash with Read Accelerator
â Up to 2 KB of SRAM
Programmable Analog
â Two current DACs (IDACs) for general-purpose or capacitive
sensing applications
â One low-power comparator with internal reference
Low Power 1.71-V to 5.5-V operation
â Deep Sleep mode with wake-up on interrupt and I2C address
detect
Capacitive Sensing
â Cypress CapSense Sigma-Delta (CSD) provides best-in-class
signal-to-noise ratio (SNR) and water tolerance
â Cypress-supplied software component makes capacitive
sensing design easy
â Automatic hardware tuning (SmartSenseâ¢) over a sensor
range of 5 pF to 45 pF
Serial Communication
â Multi-master I2C block with the ability to do address matching
during Deep Sleep and generate a wake-up on match
Timing and Pulse-Width Modulation
â One 16-bit timer/counter/pulse-width modulator (TCPWM)
block
â Center-aligned, Edge, and Pseudo-Random modes
â Comparator-based triggering of Kill signals for motor drive and
other high-reliability digital logic applications
Up to 20 Programmable GPIO Pins
â 28-pin SSOP, 24-pin QFN, 16-pin SOIC, 16-pin QFN, 16 ball
WLCSP, and 8-pin SOIC packages
â GPIO pins on Ports 0, 1, and 2 can be CapSense or have other
functions
â Drive modes, strengths, and slew rates are programmable
PSoC Creator Design Environment
â Integrated Development Environment (IDE) provides
schematic design entry and build (with analog and digital
automatic routing)
â Applications Programming Interface (API) component for all
fixed-function and programmable peripherals
Industry-Standard Tool Compatibility
â After schematic entry, development can be done with
ARM-based industry-standard development tools
Cypress Semiconductor Corporation ⢠198 Champion Court
Document Number: 001-89638 Rev. *E
⢠San Jose, CA 95134-1709 ⢠408-943-2600
Revised May 26, 2015
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