PALC22V10D_07 Datasheet, PDF (7/12 Pages) Cypress Semiconductor – Flash Erasable, Reprogrammable CMOS PAL® Device

PALC22V10D
Military and Industrial Switching Characteristics PALC22V10D^{[2, 7]}
Parameter
t_PD
t_EA
t_ER
t_CO
t_S1
t_S2
t_H
t_P
t_WH
t_WL
f_MAX1
f_MAX2
f_MAX3
t_CF
t_AW
t_AR
t_AP
t_SPR
t_PR
Description
Input to Output
Propagation Delay^{[8, 9]}
Input to Output Enable Delay^[10]
Input to Output Disable Delay^[11]
Clock to Output Delay^{[8, 9]}
Input or Feedback Set-Up Time
Synchronous Preset Set-Up Time
Input Hold Time
External Clock Period (t_CO + t_S)
Clock Width HIGH^[6]
Clock Width LOW^[6]
External Maximum Frequency
(1/(t_CO + t_S))^[12]
Data Path Maximum Frequency
(1/(t_WH + t_WL))^{[6, 13]}
Internal Feedback Maximum
Frequency (1/(t_CF + t_S))^[6,14]
Register Clock to
Feedback Input^[6,15]
Asynchronous Reset Width
Asynchronous Reset
Recovery Time
Asynchronous Reset to
Registered Output Delay
Synchronous Preset
Recovery Time
Power-Up Reset Time^{[6, 16]}
22V10D-10
Min. Max.
3
10
10
10
2
7
6
7
0
12
3
3
76.9
142
111
3
10
6
12
8
1
22V10D-15
Min. Max.
3
15
15
15
2
8
10
10
0
20
6
6
50.0
83.3
68.9
4.5
15
12
20
20
1
22V10D-25
Min. Max.
3
25
25
25
2
15
18
18
0
33
14
14
30.3
35.7
32.2
13
25
25
25
25
1
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
ns
ns
µs
7