BCM43903 Datasheet, PDF (46/87 Pages) Cypress Semiconductor – WICED™ IEEE 802.11 b/g/n SoC with an Embedded Applications Processor

BCM43903 Preliminary Data Sheet
Signal Descriptions
Table 7: Signal Descriptions (Cont.)
Ball Number Signal Name
Type Description
Ground
L2, L5, M3, M4, WRF_AFE_GND
M5, N2, N3, N7,
P4
M11, K11, H10, VSSC
D10, J9, G9, F9,
C9, L8, F8, D8,
G7, D7, J6, F6,
J5, K4, G4, G3,
E3, C3, K2, G2,
D2, B2, K1
A12
SR_PVSS
C10
PMU_AVSS
M7
AVSS
GND AFE ground
GND Core ground for WLAN and APP sections
GND Power ground
GND Quiet ground
GND Baseband PLL ground
Hibernation Block, Power-Down/Power-Up, and Reset
A10
REG_ON
I
Used by PMU to power up or power down the internal
BCM43903 regulators used by the WLAN and APP
sections. Also, when deasserted, this pin holds the WLAN
and APP sections in reset. This pin has an internal 200 kΩ
pull-down resistor that is enabled by default. It can be
disabled through programming.
K3
HIB_REG_ON_IN
I
Used by the hibernation block to power up or power down
the internal BCM43903 regulators. For applications that use
the hibernation block, HIB_REG_ON_OUT must connect to
REG_ON. Also, when deasserted, this pin holds the WLAN
and APP sections in reset.
H1
HIB_REG_ON_OUT
O REG_ON output signal generated by the hibernation block.
H3
HIB_WAKE_B
I
Wake up chip from hibernation mode.
J3
HIB_LPO_SELMODE I
Select precise or coarse 32 kHz clock.
P11
SRSTN
I
System reset. This active-low signal resets the backplanes.
JTAG Interface
P10
JTAG_SEL
I
JTAG select. This pin must be connected to ground if the
JTAG interface is not used.
No Connects
J10,
J11,
J12,
H9,
H12,
G11,
N10,
L4
NC_J10,
NC_J11,
NC_J12,
NC_H9,
NC_H12,
NC_G11,
NC_N10,
WRF_EXT_TSSIA
– No connect
Broadcom^®
March 12, 2016 • 43903-DS102-R
BROADCOM CONFIDENTIAL
Page 45