CM6533-N Datasheet, PDF (37/60 Pages) C-Media Electronics – USB 2.0 Full-Speed compliant

CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
6.8.10 I2C Master Clock Period Setting Register
Address: 0x96
Bits R/W
Bit Mnemonic
Description
7
W
CHG_ENABLE MCU can program I2C clock; 1’b1: enable
6 R/W
5-0 W
LD_SEL
CHG_FREQ
MCU download select
1’b0 : SPI download
1’b1 : I2C download
Set I2C-master clock period.
The clock
period=83.3*5*(CHG_FREQ+1)
Ex: CHG_FREQ = 6’d48
I2C Clock
Period=83.3*5*(48+1)=20408ns
HW limitation CHG_FREQ >= 6’h3
Default
1’b0
(POR)
1’b0
(POR)
6’h0
(POR)
Page 37 / 60
Rev.1.6
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