CM6533-N Datasheet, PDF (35/60 Pages) C-Media Electronics – USB 2.0 Full-Speed compliant

CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
6.8.6 I2C Master Data Register
Address: 0x83 ~ 0x92
Bits R/W Bit Mnemonic
Description
7-0 R/W data0~ data15
The data read from or written to the
slave device.
Default
8’b0
(POR)
6.8.7 I2C Master Control and Status Register 0
Address: 0x93
Bits R/W Bit Mnemonic
Description
7-0 R/W
i2c_ctrl_reg1
Data length of read/write command
8’h1: 1 byte, minimum length
8’h2: 2 bytes
…
8’hFE: 254 bytes
8’hFF: 256 bytes, maximum length
Default
0x14
(POR)
6.8.8 I2C Master Control and Status Register 1
Address: 0x94
Bits R/W
7 R/W
6 R/W
5 R/W
4 R/W
3 R/W
2 R/W
1 R/W
Bit Mnemonic
i2c_start
i2c_reset
map_len
clk_sync
fast_std
map_only
auto_rd
Description
Trigger I2C read/write command
0->1: trigger I2C read/write command.
1->0: I2C interface had completed
current task.
0 : I2C interface is idle and ready for
work.
1 : I2C interface is running.
Reset I2C interface
0 : Not reset I2C interface
1 : Reset I2C interface
MAP length
0 : 8-bit MAP
1 : 16-bit MAP
Clock Synchronization
0: off
1: on, when slave pull-down SCLK,
master would pause
I2C speed mode
0 : Standard mode, 100kHz
1 : Fast mode, 400kHz
MAP only write command
0 : Write command.
1 : MAP only write command.
Auto read command
0 : Read command.
1 : Auto read command.
Default
1’b0
(POR)
1’b0
(POR)
1’b0
(POR)
1’b1
(POR)
1’b0
(POR)
1’b0
(POR)
1’b1
(POR)
Page 35 / 60
Rev.1.6
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