CM6533-N Datasheet, PDF (34/60 Pages) C-Media Electronics – USB 2.0 Full-Speed compliant

CM6533,CM6533N,CM6533X1,CM6533DH
USB Audio Chip
6.8.2I2C-Master Read with clk_sync mode
6.8.3 I2C Master Device Address and Control Register
Address: 0x80
Bits R/W Bit Mnemonic
Description
7-1 R/W
SA_reg
The target slave device address.
0 R/W
SA_reg
1: read, 0: write
Default
0xA8
(POR)
1’b0
(POR)
6.8.4 I2C Master Memory Address Pointer (MAP) Register
Address: 0x81
Bits R/W Bit Mnemonic
Description
7-0 R/W
MAP_reg
The register low byte address of salve
device to be read or written.
Default
8’b0
(POR)
6.8.5 I2C Master Memory Address Pointer (MAP2) Register
Address: 0x82
Bits R/W Bit Mnemonic
Description
7-0 R/W
MAP2_reg
The register high byte address of salve
device to be read or written.
Default
8’b0
(POR)
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Rev.1.6
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