CS42448_07 Datasheet, PDF (52/64 Pages) Cirrus Logic – 108 dB, 192 kHz 6-In, 8-Out CODEC

CS42448
6.15 Status Mask (Address 1Ah)
7
Reserved
6
Reserved
5
Reserved
4
DAC_CLK
Error_M
Default = 00000
3
ADC_CLK
Error_M
2
1
ADC3_OVFL_M ADC2_OVFL_M
0
ADC1_OVFL_M
Function:
The bits of this register serve as a mask for the error sources found in the register “Status (Address 19h)
(Read Only)” on page 51. If a mask bit is set to 1, the error is unmasked, meaning that its occurrence will
affect the INT pin and the status register. If a mask bit is set to 0, the error is masked, meaning that its oc-
currence will not affect the INT pin or the status register. The bit positions align with the corresponding bits
in the Status register.
6.16 MUTEC Pin Control (Address 1Bh)
7
Reserved
6
Reserved
5
Reserved
4
Reserved
3
Reserved
2
Reserved
1
MCPolarity
0
MUTEC
ACTIVE
6.17 MUTEC Polarity Select (MCPOLARITY)
Default = 0
0 - Active low
1 - Active high
Function:
Determines the polarity of the MUTEC pin.
6.18 MUTE CONTROL ACTIVE (MUTEC ACTIVE)
Default = 0
0 - MUTEC pin is not active.
1 - MUTEC pin is active.
Function:
The MUTEC pin will go high or low (depending on the MUTEC Polarity Select bit) when this bit is enabled.
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DS648F3