CS4245_07 Datasheet, PDF (48/57 Pages) Cirrus Logic – 104 dB, 24-Bit, 192 kHz Stereo Audio CODEC

CS4245
shown in Table 17. The volume changes are implemented as dictated by the DACSoft and DACZero-
Cross bits in the DAC Control 2 register (see Section 6.12.1).
Binary Code
00000000
00000001
00101000
00101001
11111110
11111111
Volume Setting
0 dB
-0.5 dB
-20 dB
-20.5 dB
-127 dB
-127.5 dB
Table 17. Digital Volume Control Example Settings
6.12 DAC Control 2 - Address 0Ch
7
DACSoft
6
DACZero
5
InvertDAC
4
Reserved
3
Reserved
6.12.1 DAC Soft Ramp or Zero Cross Enable (Bits 7:6)
2
Reserved
1
Reserved
0
Active_H/L
Function:
Soft Ramp Enable
Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally ramp-
ing, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock periods.
See Table 18.
Zero Cross Enable
Zero Cross Enable dictates that signal-level changes, either by attenuation changes or muting, will occur
on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a time-
out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample rate) if the signal
does not encounter a zero crossing. The zero cross function is independently monitored and implemented
for each channel. See Table 18.
Soft Ramp and Zero Cross Enable
Soft Ramp and Zero Cross Enable dictate that signal-level changes, either by attenuation changes or mut-
ing, will occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level change will
occur after a time-out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sam-
ple rate) if the signal does not encounter a zero crossing. The zero cross function is independently mon-
itored and implemented for each channel. See Table 18.
DACSoft
0
0
1
1
DACZeroCross
0
1
0
1
Mode
Changes to affect immediately
Zero Cross enabled
Soft Ramp enabled
Soft Ramp and Zero Cross enabled (default)
Table 18. DAC Soft Cross or Zero Cross Mode Selection
6.12.2 Invert DAC Output (Bit 5)
Function:
When this bit is set, the output of the DAC is inverted.
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