CDB53L21 Datasheet, PDF (22/33 Pages) Cirrus Logic – Evaluation Board for CS53L21

6. BLOCK DIAGRAM
Software Mode
Control Port
Figure 32 on page 28
Hardware Mode
Switches
Figure 27 on page 23
Reset
Hardware Mode
Switches
Figure 30 on page 26
I²C/SPI Header
Figure 27 on page 23
MCLK
Reset
S/PDIF Out
(CS8406)
Figure 29
on page 25
FPGA
Figure 30
on page 26
CS53L21
Figure 27 on page 23
MCLK
Oscillator
(socket)
Figure 31
on page 27
Reset
Clocks/Data Header
Figure 31 on page 27
Reset
Figure 26. Block Diagram
Analog Input
Figure 28 on page 24