CDB53L21 Datasheet, PDF (12/33 Pages) Cirrus Logic – Evaluation Board for CS53L21

CDB53L21
2.5 Register Maps Tab
The Advanced Register Debug tab provides low-level control of the CS53L21 individual register settings.
Register values can be modified bit-wise or byte-wise. For bit-wise, click the appropriate push-button for the
desired bit. For byte-wise, the desired hex value can be typed directly into the register address box in the
register map. The “FPGA” and “GPIO” tabs may be ignored.
Figure 5. Register Maps Tab - CS53L21
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DS700DB1