CS2200-CP_09 Datasheet, PDF (17/26 Pages) Cirrus Logic – Fractional-N Frequency Synthesizer

CS2200-CP
CS
CCLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
CDIN
CHIP ADDRESS
MAP BYTE
DATA
DATA +n
1 0 0 1 1 1 1 0 INCR 6 5 4 3 2 1 0 7 6
10 7 6
10
Figure 11. Control Port Timing in SPI Mode
The signal timings for a read and write cycle are shown in Figure 12 and Figure 13. A Start condition is de-
fined as a falling transition of SDA while the clock is high. A Stop condition is a rising transition while the
clock is high. All other transitions of SDA occur while the clock is low. The first byte sent to the CS2200 after
a Start condition consists of the 7-bit chip address field and a R/W bit (high for a read, low for a write). The
upper 6 bits of the 7-bit address field are fixed at 100111 followed by the logic state of the AD0 pin. The
eighth bit of the address is the R/W bit. If the operation is a write, the next byte is the Memory Address Point-
er (MAP) which selects the register to be read or written. If the operation is a read, the contents of the reg-
ister pointed to by the MAP will be output. Setting the auto increment bit in MAP allows successive reads or
writes of consecutive registers. Each byte is separated by an acknowledge bit. The ACK bit is output from
the CS2200 after each input byte is read and is input from the microcontroller after each transmitted byte.
SCL
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 24 25 26 27 28
CHIP ADDRESS (WRITE)
MAP BYTE
DATA
DATA +1
SDA
1 0 0 1 1 1 AD0 0
INCR 6 5 4 3 2 1 0
76
ACK
ACK
START
10
76
ACK
10
DATA +n
76 10
ACK
STOP
Figure 12. Control Port Timing, I²C Write
SCL
SDA
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
CHIP ADDRESS (WRITE)
MAP BYTE
STOP
CHIP ADDRESS (READ)
DATA
DATA +1 DATA + n
1 0 0 1 1 1 AD0 0
INCR 6 5 4 3 2 1 0
1 0 0 1 1 1 AD0 1
70
7
0
70
START
ACK
ACK
ACK
ACK
START
Figure 13. Control Port Timing, I²C Aborted Write + Read
NO
ACK _STOP
Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shown
in Figure 12, the write operation is aborted after the acknowledge for the MAP byte by sending a stop con-
dition. The following pseudocode illustrates an aborted write operation followed by a read operation.
Send start condition.
Send 100111x0 (chip address & write operation).
Receive acknowledge bit.
Send MAP byte, auto increment off.
Receive acknowledge bit.
DS759F1
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