CS4226 Datasheet, PDF (11/60 Pages) Cirrus Logic – Surround Sound Codec

CS4226
Adjustable Input Gain
The signals from the line inputs are routed to a pro-
grammable gain circuit which provides up to 9 dB
of gain in 3 dB steps. The gain is adjustable
through the Input Control Byte. Right and left
channel gain settings are controlled independently
with the GNR1/0 and GNL1/0 bits. Level changes
occur immediately on register updates. To mini-
mize audible artifacts, level changes should be
done with the channel muted.
The ADC Status Report Byte provides feedback of
input level for each ADC channel. This register
continously monitors the ADC output and records
the peak output level since the last register read.
Reading this register causes it to reset to 0 and peak
monitoring begins again.
High Pass Filter
The operational amplifiers in the input circuitry
driving the CS4226 may generate a small DC offset
into the A/D converter. The CS4226 includes a
high pass filter after the decimator to remove any
DC offset which could result in recording a DC lev-
el, possibly yielding "clicks" when switching be-
tween devices in a multichannel system.
The characteristics of this first-order high pass fil-
ter are outlined Table 2 below for an output sample
rate of 44.1 kHz. This filter response scales linearly
with sample rate.
Frequency Response
Phase Deviation
Passband Ripple
-3dB @ 3.4 Hz
-0.13 dB @ 20 Hz
10 degrees @ 20 Hz
None
Table 2. High Pass Filter Characteristics
Analog Outputs
Line Level Outputs
The CS4226 contains an on-chip buffer amplifier
producing single-ended outputs capable of driving
10 kΩ loads. Each output (A_OUT 1-6) will produce
a nominal 2.83 Vpp (1 Vrms) output with a 2.3 volt
quiescent voltage for a full scale digital input. The
recommended off-chip analog filter is a 2nd order
Butterworth with a -3 dB corner at Fs, see Figure 3.
This filter provides out-of-band noise attenuation
along with a gain of 2, providing a 2 Vrms output
signal. A 3rd order Butterworth filter with a -3dB
corner at 0.75 Fs can be used if greater out of band
noise filtering is desired. The CS4226 DAC inter-
polation filter is a linear phase design which has
been pre-compensated for an external 2nd order
Butterworth filter to provide a flat frequency re-
sponse and linear phase response over the pass-
band. If this filter is not used, small frequency
response magnitude and phase errors will occur.
Output Level Attenuator
The DAC outputs are each routed through an atten-
uator which is adjustable in 1 dB steps. Output at-
tenuation is available through the Output
Attenuator Data Bytes. Level changes are imple-
mented in the analog domain such that the noise is
attenuated by the same amount as the signal , until
the residual output noise is equal to the noise floor
in the mute state; at this point attenation is imple-
mented in the digital domain. The change from an-
alog to digital attenuation occurs at -23 dB. Level
changes only take effect on zero crossings to mini-
mize audible artifacts. If there is no zero crossing,
then the requested level change will occur after a
time-out period between 512 and 1024 frames
(11.6 ms to 23.2 ms at 44.1 kHz frame rate). There
is a separate zero crossing detector for each chan-
nel. Each ACC bit (Acceptance bit) in the DAC
Status Report Byte gives feedback on when a vol-
ume control change has taken effect. This bit goes
high when a new setting is loaded and returns low
when it has taken effect. Volume control changes
can be instantaneous by setting the Zero Crossing
Disable (ZCD) bit in the DAC Control Byte to 1.
Each output can be independently muted via mute
control bits, MUT6-1, in the DAC Control Byte.
DS188F1
11