THC63LVD1024_16 Datasheet, PDF (9/23 Pages) California Eastern Labs – 135MHz 67Bits LVDS Receiver

THC63LVD1024_Rev.3.02_E
Electrical Characteristics (Continued)
Output load limitation
Output load is limited so that Junction temperature is not over 125 C
calculating formula
Tj = Ta + _ja * P
P = V_CC * (I_OUTDT + I_OUTCK + I_CORE)
I_OUTDT = 1/2 * F_CLK * V_CC * C_LOAD * n
I_OUTCK = F_CLK * V_CC * C_LOAD
Tj : Junction temperature 125 C
Ta : Ambient temperature 70 C
ja ^{: Package thermal resistance = 22 [ C /W]}
I_CORE: Supply Current except all output buffers = 520mA
I_OUTDT: Supply Current only output buffers of data output.
(R1,G1,B1,R2,G2,B2,HSYNC,VSYNC,DE,CONT11,CONT12,CONT21,CONT22)
I_OUTCK: Supply Current only output buffer of CLKOUT.
F_CLK : CLKOUT Frequency
n : 67 (Number of data output pin)
Load Limitation
15
14
13
12
11
10
9
8
100
105
110
115
120
125
130
135
Frequency[MHz]
Fig2. CMOS/TTL Output Load Limitation
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