THC63LVD1024_16 Datasheet, PDF (16/23 Pages) California Eastern Labs – 135MHz 67Bits LVDS Receiver

THC63LVD1024_Rev.3.02_E
LVDS Input Data Mapping
Previous Cycle
(2nd Pixel Data)
RCLK+
Current Cycle
(1st Pixel Data)
Rx1+/-
x= A, B, C, D, E
Current Cycle
(1st Pixel Data)
RCLK+
Next Cycle
(2nd Pixel Data)
Rx1+/-
x= A, B, C, D, E
Fig10. LVDS Inputs Mapped to TTL Data Outputs
MODE1= H (Single-in Mode)
Previous Cycle
RCLK+
Current Cycle
Rx1+/-
x= A, B, C, D, E
Rx2+/-
x= A, B, C, D, E
Fig11. LVDS Inputs Mapped to TTL Data Outputs
MODE1= L (Dual-in Mode)
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