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HCTL-1101 Datasheet, PDF (12/40 Pages) AVAGO TECHNOLOGIES LIMITED – General Purpose Control ICs Position and Velocity Control Low Power CMOS
Output Signal
Pin Number
Symbol PDIP PLCC
MC0-MC7 18-25
20-22,
24-28
Pulse
16
18
Sign
17
PHA-PHD 26-29
Prof
12
19
29-32
13
Init
13
14
Description
Motor Command Port – 8-bit output port which contains the digital motor command adjusted
for easy bipolar DAC interfacing. MC7 is the most significant bit (MSB).
Pulse – Pulse width modulated signal whose duty cycle is proportional to the Motor Command
magnitude. The frequency of the signal is External Clock/100 and pulse width is resolved into 100
external clocks.
Sign – Gives the sign/direction of the pulse signal.
Phase A, B, C, D – Phase Enable outputs of the Commutator.
Profile Flag – Status flag which indicates that the controller is executing a profiled position move
in the Trapezoidal Profile Control mode.
Initialization/Idle Flag – Status flag which indicates that the controller is in the Initialization/Idle
mode.
PIN Functionality
SYNC Pin
The SYNC pin is used to synchronize two or more ICs. It is
only valid in the INIT/IDLE mode (see operating the HCTL-
1101). When this pin is pulled low, the internal sample tim-
er is cleared and held to zero. When the level on the pin is
returned to high, the internal sample timer instantly starts
counting down from the programmed value.
Connecting all SYNC pins together in the system and puls-
ing the SYNC signal from the host processor will synchro-
nize all controllers.
LIMIT Pin
This emergency-flag input is used to disable the control
modes of the HCTL-1101. A low level on this input pin
causes the internal LIMIT flag to be set. If this pin is NOT
used, it must be pulled up to VDD. If it is not connected, the
pin could float low, and possibly trigger a false emergency
condition.
The LIMIT flag, when set in any control mode, causes the
HCTL-1101 to go into the Initialization/ Idle mode, clear-
ing the Motor Command and causing an immediate mo-
tor shutdown. When the LIMIT flag is set, none of the three
control mode flags (F0, F3, or F5) are cleared as the HCTL-
1101 enters the Initialization/Idle mode. The user should
be aware that these flags are still set before commanding
the HCTL-1101 to re-enter one of the four control modes
from Initialization/Idle mode. In general, the user should
clear all control mode flags after the LIMIT pin has been
pulled low, then proceed.
STOP Pin
The STOP flag affects the HCTL-1101 only in the Integral
Velocity Mode.
When a low level is present on this emergency-flag input,
the internal STOP flag is set. If this pin is NOT used, it must
be pulled up to VDD. If it is not connected, the pin could
float low, and possibly trigger a false emergency condition.
When the STOP flag is set, the system will come to a de-
celerated stop and stay in this mode with a command
velocity of zero until the Stop flag is cleared and a new
command velocity is specified.
Notes on LIMIT and STOP Flags
STOP and LIMIT flags are set by a low level input at their
respective pins. The flags can only be cleared when the
input to the corresponding pin goes high, signifying that
the emergency condition has been corrected, AND a write
to the Status register (R07H) is executed. That is, after the
emergency pin has been set and cleared, the flag also
must be cleared by writing to R07H. Any word that is writ-
ten to R07H after the emergency pin is set and cleared will
clear the emergency flag. The lower four bits of that word
will also reconfigure the Status register.
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