AT91SAM9G45B-CU Datasheet, PDF (809/1185 Pages) ATMEL Corporation – AT91SAM ARM-based Embedded MPU

Figure 38-14. Data OUT Transfer for an Endpoint with Two Banks
Host sends first data payload
Microcontroller reads Data 1 in bank 0,
Host sends second data payload
Microcontroller reads Data 2 in bank 1,
Host sends third data payload
USB Bus
Packets
Token OUT
Data OUT 1
ACK Token OUT
Data OUT 2 ACK Token OUT Data OUT 3
Virtual RX_BK_RDY
Bank 0
Virtual RX_BK_RDY
Bank 1
Set by Hardware,
Data payload written
in FIFO endpoint bank 0
Interrupt pending
Set by Hardware
Data Payload written
in FIFO endpoint bank 1
Cleared by Firmware
Interrupt pending
Cleared by Firmware
RX_BK_RDY = (virtual bank 0 | virtual bank 1)
(UDPHS_EPTSTAx)
FIFO (DPR)
Bank 0
Data OUT 1
Write by UDPHS Device
Data OUT 1
Read by Microcontroller
FIFO (DPR)
Bank 1
Data OUT 2
Write by Hardware
Data OUT 3
Write in progress
Data OUT 2
Read by Microcontroller
38.5.8.13 High Bandwidth Isochronous Endpoint OUT
Figure 38-15. Bank Management, Example of Three Transactions per Microframe
USB bus
Transactions
MDATA0 MDATA1 DATA2
MDATA0 MDATA1 DATA2
t=0
RX_BK_RDY
Microcontroller FIFO
(DPR) Access
Read Bank 1
t = 52.5 μs
(40% of 125 μs)
Read Bank 2
t = 125 μs
RX_BK_RDY
USB line
Read Bank 3
Read Bank 1
USB 2.0 supports individual High Speed isochronous endpoints that require data rates up to 192 Mb/s (24 MB/s):
3x1024 data bytes per microframe.
To support such a rate, two or three banks may be used to buffer the three consecutive data packets. The micro-
controller (or the DMA) should be able to empty the banks very rapidly (at least 24 MB/s on average).
NB_TRANS field in UDPHS_EPTCFGx register = Number Of Transactions per Microframe.
If NB_TRANS > 1 then it is High Bandwidth.
Example:
• If NB_TRANS = 3, the sequence should be either
SAM9G45 [DATASHEET]
6438K–ATARM–12-Feb-13
809