AT91RM9200_09 Datasheet, PDF (618/701 Pages) ATMEL Corporation – ARM920T-based Microcontroller

36.6.4 EMAC Transmit Address Register
Name:
ETH_TAR
Access Type:
Read/Write
31
30
29
28
27
26
25
24
ADDRESS
23
22
21
20
19
18
17
16
ADDRESS
15
14
13
12
11
10
9
8
ADDRESS
7
6
5
4
3
2
1
0
ADDRESS
• ADDRESS: Transmit Address Register
Written with the address of the frame to be transmitted, read as the base address of the buffer being accessed by the trans-
mit FIFO. Note that if the two least significant bits are not zero, transmit starts at the byte indicated.
36.6.5 EMAC Transmit Control Register
Name:
ETH_TCR
Access Type:
Read/Write
31
30
29
–
–
–
23
22
21
–
–
–
15
14
13
NCRC
–
–
7
6
5
28
27
–
–
20
19
–
–
12
11
–
–
4
3
LEN
26
25
24
–
–
–
18
17
16
–
–
–
10
9
8
LEN
2
1
0
• LEN: Transmit Frame Length
This register is written to the number of bytes to be transmitted excluding the four CRC bytes unless the no CRC bit is
asserted. Writing these bits to any non-zero value initiates a transmission. If the value is greater than 1514 (1518 if no CRC
is being generated), an oversize frame is transmitted. This field is buffered so that a new frame can be queued while the
previous frame is still being transmitted. Must always be written in address-then-length order. Reads as the total number of
bytes to be transmitted (i.e., this value does not change as the frame is transmitted.) Frame transmission does not start
until two 32-bit words have been loaded into the transmit FIFO. The length must be great enough to ensure two words are
loaded.
• NCRC: No CRC
If this bit is set, it is assumed that the CRC is included in the length being written in the low-order bits and the MAC does not
append CRC to the transmitted frame. If the buffer is not at least 64 bytes long, a short frame is sent. This field is buffered
so that a new frame can be queued while the previous frame is still being transmitted. Reads as the value of the frame cur-
rently being transmitted.
618 AT91RM9200
1768I–ATARM–09-Jul-09