AT91RM9200_09 Datasheet, PDF (395/701 Pages) ATMEL Corporation – ARM920T-based Microcontroller

AT91RM9200
29. Two-wire Interface (TWI)
29.1 Overview
The Two-wire Interface (TWI) interconnects components on a unique two-wire bus, made up of
one clock line and one data line with speeds of up to 400 Kbits per second, based on a byte-ori-
ented transfer format. It can be used with any Atmel two-wire bus serial EEPROM. The TWI is
programmable as a master with sequential or single-byte access.
A configurable baud rate generator permits the output data rate to be adapted to a wide range of
core clock frequencies.
The main features of the TWI are:
• Compatibility with standard two-wire serial memory
• One, two or three bytes for slave address
• Sequential Read/Write operations
29.2 Block Diagram
Figure 29-1. Block Diagram
APB Bridge
PMC
MCK
Two-wire
Interface
PIO
TWI
Interrupt
AIC
TWCK
TWD
29.3 Application Block Diagram
Figure 29-2. Application Block Diagram
Host with
TWI
Interface
TWD
TWCK
AT24LC16
U1
Slave 1
R
AT24LC16
U2
Slave 2
LCD Controller
U3
Slave 3
VDD
R
1768I–ATARM–09-Jul-09
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