AT91RM9200_09 Datasheet, PDF (194/701 Pages) ATMEL Corporation – ARM920T-based Microcontroller

19.2 Block Diagram
Figure 19-1. SDRAM Controller Block Diagram
SDRAMC
Memory
Controller
SDRAMC
Chip Select
SDRAMC
Interrupt
PMC
MCK
19.3 I/O Lines Description
Table 19-1.
Name
SDCK
SDCKE
SDCS
BA[1:0]
RAS
CAS
SDWE
NBS[3:0]
A[12:0]
D[31:0]
I/O Line Description
Description
SDRAM Clock
SDRAM Clock Enable
SDRAM Controller Chip Select
Bank Select Signals
Row Signal
Column Signal
SDRAM Write Enable
Data Mask Enable Signals
Address Bus
Data Bus
User Interface
APB
PIO
Controller
SDCK
SDCKE
SDCS
BA[1:0]
RAS
CAS
SDWE
NBS[3:0]
A[12:0]
D[31:0]
Type
Output
Output
Output
Output
Output
Output
Output
Output
Output
I/O
Active Level
High
Low
Low
Low
Low
Low
194 AT91RM9200
1768I–ATARM–09-Jul-09