AT91SAM7XC512_14 Datasheet, PDF (580/731 Pages) ATMEL Corporation – High-performance 32-bit RISC Architecture

38.8.1 CAN Mode Register
Name:
CAN_MR
Access Type:
Read-write
31
30
29
28
27
26
25
24
–
–
–
–
–
RXSYNC
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
DRPT
6
TIMFRZ
5
TTM
4
TEOF
3
OVL
2
ABM
1
LPM
0
CANEN
• CANEN: CAN Controller Enable
0 = The CAN Controller is disabled.
1 = The CAN Controller is enabled.
• LPM: Disable/Enable Low Power Mode
w Power Mode.
1 = Enable Low Power M
CAN controller enters Low Power Mode once all pending messages have been transmitted.
• ABM: Disable/Enable Autobaud/Listen mode
0 = Disable Autobaud/listen mode.
1 = Enable Autobaud/listen mode.
• OVL: Disable/Enable Overload Frame
0 = No overload frame is generated.
1 = An overload frame is generated after each successful reception for mailboxes configured in Receive with/without over-
write Mode, Producer and Consumer.
• TEOF: Timestamp messages at each end of Frame
0 = The value of CAN_TIM is captured in the CAN_TIMESTP register at each Start Of Frame.
1 = The value of CAN_TIM is captured in the CAN_TIMESTP register at each End Of Frame.
• TTM: Disable/Enable Time Triggered Mode
0 = Time Triggered Mode is disabled.
1 = Time Triggered Mode is enabled.
• TIMFRZ: Enable Timer Freeze
0 = The internal timer continues to be incremented after it reached 0xFFFF.
1 = The internal timer stops incrementing after reaching 0xFFFF. It is restarted after a timer reset. See “Freezing the Inter-
nal Timer Counter” on page 577.
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6209H–ATARM–15-Apr-13