AT91SAM7XC512_14 Datasheet, PDF (135/731 Pages) ATMEL Corporation – High-performance 32-bit RISC Architecture

AT91SAM7XC512/256/128
Figure 20-6. Example of Partial Page Programming:
32 bits wide
32 bits wide
32 bits wide
16 words
16 words
16 words
16 words
FF FF FF FF
...
FF FF FF FF
FF FF FF FF
FF FF... FF FF
FF FF FF FF
FF FF FF FF
FF FF FF FF
...
FF FF FF FF
FF FF FF FF
FF FF FF FF
...
FF FF FF FF
FF FF FF FF
FF FF FF FF
...
FF FF FF FF
FF FF FF FF
CA FE CA FE
...
CA FE CA FE
CA FE CA FE
FF FF FF FF
...
FF FF FF FF
FF FF FF FF
FF FF FF FF
...
FF FF FF FF
FF FF FF FF
FF FF FF FF
...
FF FF FF FF
FF FF FF FF
CA FE CA FE
...
CA FE CA FE
CA FE CA FE
DE CA DE CA
...
DE CA DE CA
DE CA DE CA
FF FF FF FF
...
FF FF FF FF
FF FF FF FF
Step 1.
Erase All Flash
Page 7 erased
Step 2.
Programming of the second part of Page 7
(NEBP = 1)
Step 3.
Programming of the third part of Page 7
(NEBP = 1)
After programming, the page (the whole lock region) can be locked to prevent miscellaneous
write or erase sequences. The lock bit can be automatically set after page programming using
WPL.
Data to be written are stored in an internal latch buffer. The size of the latch buffer corresponds
to the page size. The latch buffer wraps around within the internal memory area address space
and appears to be repeated by the number of pages in it.
Note: Writing of 8-bit and 16-bit data is not allowed and may lead to unpredictable data corruption.
Data are written to the latch buffer before the programming command is written to the Flash
Command Register MC_FCR. The sequence is as follows:
• Write the full page, at any page address, within the internal memory area address space
using only 32-bit access.
• Programming starts as soon as the page number and the programming command are written
to the Flash Command Register. The FRDY bit in the Flash Programming Status Register
(MC_FSR) is automatically cleared.
• When programming is completed, the bit FRDY in the Flash Programming Status Register
(MC_FSR) rises. If an interrupt was enabled by setting the bit FRDY in MC_FMR, the
interrupt line of the Memory Controller is activated.
Two errors can be detected in the MC_FSR register after a programming sequence:
• Programming Error: A bad keyword and/or an invalid command have been written in the
MC_FCR register.
• Lock Error: The page to be programmed belongs to a locked region. A command must be
previously run to unlock the corresponding region.
20.2.4.2
Erase All Command
The entire memory can be erased if the Erase All Command (EA) in the Flash Command Regis-
ter MC_FCR is written.
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