AT91SAM7XC512_14 Datasheet, PDF (530/731 Pages) ATMEL Corporation – High-performance 32-bit RISC Architecture

– In two-key encryption mode, the data is first encrypted with Key 1, then decrypted
using Key 2 and then encrypted with Key 1.
– In two-key decryption mode, the data is decrypted with Key 1, then encrypted with
Key 2 and then decrypted using Key 1.
The input to the encryption processes of the CBC, CFB, and OFB modes includes, in addition to
the plaintext, a 64-bit data block called the initialization vector (IV), which must be set in the Ini-
tialization Vector Registers (TDES_IVxR). The initialization vector is used in an initial step in the
encryption of a message and in the corresponding decryption of the message.
37.3.1
Operation Modes
The TDES supports the following modes of operation:
• ECB: Electronic Code Book
• CBC: Cipher Block Chaining
• OFB: Output Feedback
• CFB: Cipher Feedback
– CFB8 (CFB where the length of the data segment is 8 bits)
– CFB16 (CFB where the length of the data segment is 16 bits)
– CFB32 (CFB where the length of the data segment is 32 bits)
– CFB64 (CFB where the length of the data segment is 64 bits)
The data pre-processing, post-processing and data chaining for each mode are automatically
performed. Refer to the FIPS Publication 81 for more complete information.
These modes are selected by setting the OPMOD field in the TDES Mode Register (TDES_MR).
In CFB mode, four data sizes are possible (8, 16, 32 and 64 bits), configurable by means of the
CFBS field in the mode register. (See “TDES Mode Register” on page 538.).
37.3.2
Start Modes
The SMOD field in the TDES Mode Register (TDES_MR) allows selection of encryption (or
decryption) start mode.
37.3.2.1
Manual Mode
The sequence is as follows:
• Write the 64-bit key(s) in the different Key Word Registers (TDES_KEYxWxR), depending on
whether one, two or three keys are required.
• Write the initialization vector (or counter) in the Initialization Vector Registers (TDES_IVxR).
Note: The Initialization Vector Registers concern all modes except ECB.
• Set the bit DATRDY (Data Ready) in the TDES Interrupt Enable register (TDES_IER),
depending on whether an interrupt is required or not at the end of processing.
• Write the data to be encrypted/decrypted in the authorized Input Data Registers (See Table
37-1).
Table 37-1. Authorized Input Data Registers
Operation Mode
Input Data Registers to Write
ECB
All
CBC
All
530 AT91SAM7XC512/256/128
6209H–ATARM–15-Apr-13