AT91SAM9RL64_14 Datasheet, PDF (513/903 Pages) ATMEL Corporation – Multi-layer AHB Bus Matrix for Large Bandwidth Transfers

AT91SAM9R64/RL64
35.8.1 SSC Control Register
Name:
SSC_CR
Access Type:
Write-only
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
SWRST
–
–
–
–
–
TXDIS
TXEN
7
6
5
4
3
2
1
0
–
–
–
–
–
–
RXDIS
RXEN
• RXEN: Receive Enable
0: No effect.
1: Enables Receive if RXDIS is not set.
• RXDIS: Receive Disable
0: No effect.
1: Disables Receive. If a character is currently being received, disables at end of current character reception.
• TXEN: Transmit Enable
0: No effect.
1: Enables Transmit if TXDIS is not set.
• TXDIS: Transmit Disable
0: No effect.
1: Disables Transmit. If a character is currently being transmitted, disables at end of current character transmission.
• SWRST: Software Reset
0: No effect.
1: Performs a software reset. Has priority on any other bit in SSC_CR.
6289D–ATARM–3-Oct-11
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