AT32UC3L064_1 Datasheet, PDF (403/825 Pages) ATMEL Corporation – AVR32 32-bit Microcontroller

AT32UC3L
20.7.7.5
Header Transmission (Master Node Configuration)
All the LIN Frames start with a header which is sent by the master node and consists of a Synch
Break Field, Synch Field and Identifier Field.
So in Master node configuration, the frame handling starts with the sending of the header.
The header is transmitted as soon as the identifier is written in the LIN Identifier register (LINIR).
At this moment the flag TXRDY falls.
The Break Field, the Synch Field and the Identifier Field are sent automatically one after the
other.
The Break Field consists of 13 dominant bits and 1 recessive bit, the Synch Field is the charac-
ter 0x55 and the Identifier corresponds to the character written in the LIN Identifier Register
(LINIR). The Identifier parity bits can be automatically computed and sent (see Section 20.7.7.8
on page 406).
The flag TXRDY rises when the identifier character is transferred into the Shift Register of the
transmitter.
Figure 20-27. Header Transmission
Baud Rate
Clock
TXD
Write
LINIR
Break Field
13 dominant bits (at 0)
Break
Delimiter
1 recessive bit
Start
Bit
1
01010
Synch Byte = 0x55
1
0
Stop Start
Bit Bit
ID0
ID1
ID2
ID3
ID4
ID5
ID6
ID7
Stop
Bit
(at 1)
LINIR
ID
TXRDY
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