AT32UC3A3256S_1 Datasheet, PDF (173/961 Pages) ATMEL Corporation – AVR32 32-Bit Microcontroller

AT32UC3A3
Figure 16-5. Memory Connection for a 16-bit Data Bus
SMC
D[15:0]
A[19:2]
A1
NBS0
NBS1
NWE
NRD
NCS[2]
D[15:0]
A[18:1]
A[0]
Low Byte Enable
High Byte Enable
Write Enable
Output Enable
Memory Enable
•Byte write access
The byte write access mode supports one byte write signal per byte of the data bus and a single
read signal.
Note that the SMC does not allow boot in byte write access mode.
• For 16-bit devices: the SMC provides NWR0 and NWR1 write signals for respectively byte0
(lower byte) and byte1 (upper byte) of a 16-bit bus. One single read signal (NRD) is provided.
The byte write access mode is used to connect two 8-bit devices as a 16-bit memory.
The byte write option is illustrated on Figure 16-6 on page 174.
•Byte select access
In this mode, read/write operations can be enabled/disabled at a byte level. One byte select line
per byte of the data bus is provided. One NRD and one NWE signal control read and write.
• For 16-bit devices: the SMC provides NBS0 and NBS1 selection signals for respectively
byte0 (lower byte) and byte1 (upper byte) of a 16-bit bus. The byte select access is used to
connect one 16-bit device.
32072A–AVR32–03/09
173