AT697E_09 Datasheet, PDF (106/154 Pages) ATMEL Corporation – Rad-Hard 32 bit SPARC V8 Processor

AT697
Table 64. UART 1 Control Register - UAC1
Address = 0x80000078
reserved
ec lb fl pe ps ti ri te re
Bit Number
8
7
6
5
4
3
2
1
0
r/w
xxxx xxxx xxxx xxxx xxxx xxx
Mnemonic
ec
lb
fl
pe
ps
ti
ri
te
re
Description
External Clock
if set, the UART scaler will be clocked by PIO[3]
Loop back
If set, loop back mode will be enabled.
Flow control
If set, enables flow control using CTS/RTS.
Parity enable
If set, enables parity generation and checking.
Parity select
Selects parity polarity
“0” = even parity
“1” = odd parity
Transmitter interrupt enable
If set, enables generation of transmitter interrupt.
Receiver interrupt enable
If set, enables generation of receiver interrupt.
Transmitter enable
If set, enables the transmitter.
Receiver enable
If set, enables the receiver.
r/w
xxxxxxxxx
Table 65. UART 1 Scaler Register - UASCA1
Address = 0x8000007C
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
reserved
scaler value
r/w
xxxx xxxx xxxx xxxx xxxx
r/w
xxxx xxxx xxxx
Table 66. UART 2 Data Register - UAD2
Address = 0x80000080
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
reserved
rtd2
r/w
r/w
4226G–AERO–05/09
105