AMC0XXCFLKA Datasheet, PDF (24/42 Pages) Advanced Micro Devices – 1, 2, 4, or 10 Megabyte 5.0 V-only Flash Memory PC Card

WORD-WIDE PROGRAMMING AND
ERASING
Word-Wide Programming
The Word-Wide Programming sequence will be as
usual per Table 5. The Program word command is
A0A0H. Each byte is independently programmed. For
example, if the high byte of the word indicates the suc-
cessful completion of programming via one of its write
status bits such as D15, software polling should con-
tinue to monitor the low byte for write completion and
data verification, or vice versa. During the Embedded
Programming operations the device executes program-
ming pulses in 16 µs increments. Status reads provide
information on the progress of the byte programming
relative to the last complete write pulse. Status informa-
tion is automatically updated upon completion of each
internal write pulse. Status information does not
change within the 16 µs write pulse width.
Word-Wide Erasing
The Word-Wide Erasing of a memory segment pair is
similar to word-wide programming. The erase word
command is a 6 bus cycle command sequence per
Table 5. Each byte is independently erased and veri-
fied. Word-wide erasure reduces total erase time when
compared to byte erasure. Each Flash memory device
in the card may erase at different rates. Therefore each
device (byte) must be verified separately.
Start
Write Embedded
Programming or Erase
command sequence to
memory segments
Software polling from
memory segments
The Embedded Algorithm operations completely automate
the parallel programming and erase procedures by inter-
nally executing the algorithmic command sequences of
AMD’s Flashrite and Flasherase algorithms. The devices
automatically provide Write Operation Status information
with standard read operations.
See Table 5 for Program Command Sequence.
Completed
18723C-13
Figure 12. Embedded Algorithm Word-Wide Programming and Erasure Overview
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